component
TCA9802DGKR
Public Made by Adomby adom
Texas Instruments Translators, Level Shifters, VSSOP-8-0.65mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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TCA9802DGKR
Texas Instruments · Translators, Level Shifters · VSSOP-8-0.65mm
TCA9802DGKR from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCCA | power_in | A-side supply voltage, operating range 0.8 V to 3.6 V. |
| 2 | SCLA | bidirectional | A-side serial clock bus, which must be connected to VCCA through a pull-up resistor even if unused. |
| 3 | SDAA | bidirectional | A-side serial data bus, which must be connected to VCCA through a pull-up resistor even if unused. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | EN | input | Active-high repeater enable input, referenced to VCCA. |
| 6 | SDAB | bidirectional | B-side serial data bus, which must not be connected to VCCB through a pull-up resistor for proper operation and should be left floating if unused. |
| 7 | SCLB | bidirectional | B-side serial clock bus, which must not be connected to VCCB through a pull-up resistor for proper operation and should be left floating if unused. |
| 8 | VCCB | power_in | B-side and device supply voltage, operating range 1.65 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8-0.65mm |
| Category | Logic |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage on A-side | VCCA | -0.5 | 4 | V | 4 | ||
| Supply voltage on B-side | VCCB | -0.5 | 4 | V | 4 | ||
| Enable input voltage | VEN | -0.5 | 4 | V | 4 | ||
| I2C bus voltage | VI/O | -0.5 | 4 | V | 4 | ||
| Maximum SDAA, SCLA IOL current | IOL | 20 | mA | 4 | |||
| Input clamp current (SDAB/SCLB) | IIK | -20 | mA | 4 | |||
| Input clamp current (EN, VCCA, VCCB, SDAA, SCLA) | IIK | -20 | mA | 4 | |||
| Output clamp current (SDAB/SCLB) | IOK | -20 | mA | 4 | |||
| Output clamp current (EN, VCCA, VCCB, SDAA, SCLA) | IOK | -20 | mA | 4 | |||
| Operating junction temperature | TJ | 130 | °C | 4 | |||
| Storage temperature | Tstg | -60 | 150 | °C | 4 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | 4 | ||
| Supply voltage | VCCA | 0.8 | 3.6 | V | 4 | ||
| Supply voltage | VCCB | 1.65 | 3.6 | V | 4 | ||
| Input-output voltage | VI/O | 0 | 3.6 | V | SDAA, SCLA | 4 | |
| Junction-to-ambient thermal resistance | RθJA | 174.1 | °C/W | 4 | |||
| Current source tolerance | -25 | 25 | % | 5 | |||
| Low-level output voltage | VOL | 0.04 | 0.13 | V | SDAA, SCLA IOL = 6 mA, VILB = 0 V | 5 | |
| Low-level output voltage | VOL | 0.22 | 0.26 | V | SDAB, SCLB VIA = 0 V | 5 | |
| Allowed input leakage current of ICS | IEXT-I | 0 | 200 | µA | SDAB, SCLB | 5 | |
| Allowed output leakage current of ICS | IEXT-O | 0 | 200 | µA | SDAB, SCLB | 5 | |
| Current source value | ICS | 2.2 | mA | 5 | |||
| Enable pin pull-up | REN | 150 | 250 | 450 | kΩ | 5 | |
| Low-level input current contention | IILC | 800 | µA | SDAB, SCLB | 5 | ||
| Low-level allowed pull-down resistance | RILC | 150 | Ω | SDAB, SCLB | 5 | ||
| Bus capacitance limit | CBUS | 0 | 400 | pF | SDAB, SCLB | 5 | |
| Under-voltage lockout VCCA | UVLO | 0.3 | 0.55 | 0.8 | V | VCCA rising and falling; VCCB = 1.65 or 3.6 V | 5 |
| Under-voltage lockout VCCB rising | UVLO | 1.3 | 1.51 | 1.6 | V | VCCB rising; VCCA = 0.8 or 3.6 V | 5 |
| Under-voltage lockout VCCB falling | UVLO | 1.2 | 1.4 | 1.6 | V | VCCB falling; VCCA = 0.8 or 3.6 V | 5 |
| Quiescent supply current for VCCA | ICCA | 0.1 | 7 | µA | SDAA = SCLA = VCCA or GND, SDAB = SCLB = open, EN = VCCA; VCCA = 0.8 V | 5 | |
| Quiescent supply current for VCCA | ICCA | 0.1 | 8 | µA | SDAA = SCLA = VCCA or GND, SDAB = SCLB = open, EN = VCCA; VCCA = 1.8 V | 5 | |
| Quiescent supply current for VCCA | ICCA | 0.2 | 9 | µA | SDAA = SCLA = VCCA or GND, SDAB = SCLB = open, EN = VCCA; VCCA = 2.5 V | 5 | |
| Quiescent supply current for VCCA | ICCA | 0.2 | 12 | µA | SDAA = SCLA = VCCA or GND, SDAB = SCLB = open, EN = VCCA; VCCA = 3.6 V | 5 | |
| Quiescent supply current for VCCB, both channels high | ICCB | 33 | 60 | µA | Both channels high, SDAA = SCLA pulled up to VCCA, SDAB = SCLB = open, EN = VCCA; VCCB = 1.8 V | 5 | |
| Quiescent supply current for VCCB, both channels high | ICCB | 36 | 65 | µA | Both channels high, SDAA = SCLA pulled up to VCCA, SDAB = SCLB = open, EN = VCCA; VCCB = 2.5 V | 5 | |
| Quiescent supply current for VCCB, both channels high | ICCB | 41 | 75 | µA | Both channels high, SDAA = SCLA pulled up to VCCA, SDAB = SCLB = open, EN = VCCA; VCCB = 3.6 V | 5 | |
| Quiescent supply current for VCCB, both channels low | ICCB | 4.3 | 5.2 | mA | Both channels low, SDAA = SCLA = GND, SDAB = SCLB = open, EN = VCCA; VCCB = 1.8 V | 5 | |
| Quiescent supply current for VCCB, both channels low | ICCB | 4.4 | 5.2 | mA | Both channels low, SDAA = SCLA = GND, SDAB = SCLB = open, EN = VCCA; VCCB = 2.5 V | 5 | |
| Quiescent supply current for VCCB, both channels low | ICCB | 4.5 | 5.3 | mA | Both channels low, SDAA = SCLA = GND, SDAB = SCLB = open, EN = VCCA; VCCB = 3.6 V | 5 | |
| Total quiescent supply current | ICCA + ICCB | 34 | µA | VCCA = VCCB = 1.8 V, SDAA/SCLA = VCCA, SDAB/SCLB = VCCB | 6 | ||
| Input leakage current | II | -10 | 10 | µA | SDAA, SCLA; VI = VCCA, EN = GND | 6 | |
| I/O capacitance | CIO | 2 | 10 | pF | SDAA, SCLA; VI = 0 V or 3.3 V, f = 1 MHz | 6 | |
| I/O capacitance | CIO | 8 | pF | SDAB, SCLB; VCCB = GND, VI = 0 V, f = 1 MHz | 6 | ||
| Max SCL clock frequency | fSCL(MAX) | 400 | kHz | 6 | |||
| Rise time Port A | tr | 57 | 70 | ns | 6 | ||
| Rise time Port B | tr | 16 | 35 | ns | VCCB = 1.65 V | 6 | |
| Rise time Port B | tr | 36 | 75 | ns | VCCB = 3.6 V | 6 | |
| Fall time Port A | tf | 9 | 30 | ns | 6 | ||
| Fall time Port B | tf | 35 | 70 | ns | 6 | ||
| Propagation delay high-to-low Port A to Port B | tPHL | 75 | 200 | ns | 6 | ||
| Propagation delay high-to-low Port B to Port A | tPHL | 85 | 250 | ns | 6 | ||
| Propagation delay low-to-high Port A to Port B | tPLH | 20 | 90 | ns | 6 | ||
| Propagation delay low-to-high Port B to Port A | tPLH | 110 | 260 | ns | 6 | ||
| Startup time | tstartup | 65 | 350 | µs | 6 | ||
| Enable time | ten | 280 | 1000 | ns | 6 | ||
| Disable time | tdis | 700 | 1800 | ns | 6 |
CAD (KiCad official)
- Symbol:
TCA9802DGKR - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)
- 3D model files:
tca9802dgkr-etched.step/tca9802dgkr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tca9802dgkr.step/tca9802dgkr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
c31cb4a7b0a39d20, retrieved 2026-11-06, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).