main
Ray Publish 0.1.0 0de0afb 5d ago
{
  "slug": "tc7w14fu",
  "version": "0.1.0",
  "type": "component",
  "description": "TOSHIBA Inverters, MSOP-8-2.8mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "tc7w14fu",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tc7w14fu.kicad_sym",
    "tc7w14fu.kicad_mod",
    "tc7w14fu.glb",
    "tc7w14fu.step",
    "tc7w14fu.lbr",
    "docs/hero.png",
    "docs/tc7w14fu-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tc7w14fu-hero.glb",
    "tc7w14fu-hero.overlay.json",
    "tc7w14fu-etched.glb"
  ],
  "component": {
    "mpn": "TC7W14FU",
    "manufacturer": "TOSHIBA",
    "package": "MSOP-8-2.8mm",
    "pin_count": 8,
    "category": "Logic",
    "subcategory": "Inverters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602551752579837952",
    "parts": {
      "symbol": "tc7w14fu.kicad_sym",
      "footprint": "tc7w14fu.kicad_mod",
      "model_3d": "tc7w14fu-hero.glb",
      "model_3d_plain": "tc7w14fu-etched.glb",
      "model_3d_step": "tc7w14fu-etched.step",
      "model_3d_step_plain": "tc7w14fu.step",
      "lbr": "tc7w14fu.lbr"
    },
    "distributor_links": {
      "lcsc": "C5956630"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T06:35:39Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Input of Schmitt inverter gate 1; the input voltage must stay within 0 to VCC, and the DC input voltage absolute maximum is −0.5 to VCC + 0.5 V."
      },
      {
        "number": "2",
        "name": "3Y",
        "type": "output",
        "description": "Output of Schmitt inverter gate 3, with symmetrical drive of |IOH| = IOL = 4 mA (min) and capability of 10 LSTTL loads."
      },
      {
        "number": "3",
        "name": "2A",
        "type": "input",
        "description": "Input of Schmitt inverter gate 2, with about 25% VCC hysteresis (VH typ. 1.1 V at VCC = 5 V) for receiving slow input signals."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference pin; the DC VCC/ground current absolute maximum is ±25 mA."
      },
      {
        "number": "5",
        "name": "2Y",
        "type": "output",
        "description": "Output of Schmitt inverter gate 2, with symmetrical drive of |IOH| = IOL = 4 mA (min) and DC output current absolute maximum of ±25 mA."
      },
      {
        "number": "6",
        "name": "3A",
        "type": "input",
        "description": "Input of Schmitt inverter gate 3, with about 25% VCC hysteresis for receiving slow input signals; the input voltage must stay within 0 to VCC."
      },
      {
        "number": "7",
        "name": "1Y",
        "type": "output",
        "description": "Output of Schmitt inverter gate 1, with symmetrical drive of |IOH| = IOL = 4 mA (min) and DC output current absolute maximum of ±25 mA."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply pin; operating range is 2 to 6 V, with an absolute maximum range of −0.5 to 7 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package name mismatch: the datasheet never says 'MSOP-8-2.8mm'. The marking table maps TC7W14FU to t; The datasheet has one pin configuration figure shared by the TC7W14FU (SM8) and TC7W14FK (US8) varia; Pin descriptions are built from the logic diagram, the truth table and the absolute maximum and oper"
        ],
        "pages_sent": 7,
        "cost_usd": 0.0451,
        "at": "2026-10-18T06:33:21"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602551752579837952",
        "pages": 7,
        "sha256": "16a775fd30193aea",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tc7w14fu.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.9,
          3.0,
          0.95
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "847c4c5023fe1603fbd36900a5dcc4bd3901ba473f71d42c9a469f0236eaadf3",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tc7w14fu-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.9,
          3.0,
          0.95
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e91c35fb5692f20c1b0826388498a09f8beb3f0b6df6f8acc47d46dbc08dcd30",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}