TC7SET02FU

TOSHIBA · Gates · SOT-353

TC7SET02FU from TOSHIBA, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN B	input	Gate input B of the 2-input NOR gate, with a 0 to 5.5 V input range (VIL 0.8 V max, VIH 2.0 V min), and it must be tied to VCC or GND if unused.
2	IN A	input	Gate input A of the 2-input NOR gate, with a 0 to 5.5 V input range (VIL 0.8 V max, VIH 2.0 V min), and it must be tied to VCC or GND if unused.
3	GND	power_in	Ground pin (0 V reference) for the device.
4	OUT Y	output	NOR gate output Y, which is high only when both inputs are low, with an output voltage range of 0 to VCC and a DC output current of ±25 mA max.
5	VCC	power_in	Positive supply pin with an operating range of 4.5 to 5.5 V (absolute maximum -0.5 to 7.0 V).

Key specifications

Parameter	Value
Manufacturer	TOSHIBA
Package	SOT-353
Category	Logic ICs
Pins	5

CAD (KiCad official)

Symbol: TC7SET02FU
Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
3D model: SOT-353 (KiCad packages3D, STEP)
3D model files: tc7set02fu-etched.step / tc7set02fu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tc7set02fu.step / tc7set02fu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: TOSHIBA datasheet (6 pp, sha256 93d78fe44f7b63df, retrieved 2026-10-28, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TC7SET02FU

**TOSHIBA** · Gates · SOT-353

TC7SET02FU from TOSHIBA, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN B | input | Gate input B of the 2-input NOR gate, with a 0 to 5.5 V input range (VIL 0.8 V max, VIH 2.0 V min), and it must be tied to VCC or GND if unused. |
| 2 | IN A | input | Gate input A of the 2-input NOR gate, with a 0 to 5.5 V input range (VIL 0.8 V max, VIH 2.0 V min), and it must be tied to VCC or GND if unused. |
| 3 | GND | power_in | Ground pin (0 V reference) for the device. |
| 4 | OUT Y | output | NOR gate output Y, which is high only when both inputs are low, with an output voltage range of 0 to VCC and a DC output current of ±25 mA max. |
| 5 | VCC | power_in | Positive supply pin with an operating range of 4.5 to 5.5 V (absolute maximum -0.5 to 7.0 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | SOT-353 |
| Category | Logic ICs |
| Pins | 5 |

## CAD (KiCad official)

- Symbol: `TC7SET02FU`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SOT-353 (KiCad packages3D, STEP)
- 3D model files: `tc7set02fu-etched.step` / `tc7set02fu-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tc7set02fu.step` / `tc7set02fu.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TOSHIBA datasheet](docs/tc7set02fu-datasheet.pdf) (6 pp, sha256 `93d78fe44f7b63df`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tc7set02fu-datasheet.pdf)