component
TC7S00F
Public Made by Adomby adom
TECH PUBLIC Logic Gates, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
TC7S00F
TECH PUBLIC · Logic Gates · SOT-23-5
TC7S00F from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INB | input | Gate input B of the 2-input NAND; input voltage range 0 to VCC (abs max -0.5 to VCC+0.5 V). |
| 2 | INA | input | Gate input A of the 2-input NAND; input voltage range 0 to VCC (abs max -0.5 to VCC+0.5 V). |
| 3 | GND | power_in | Ground reference, 0 V; max VCC/GND current ±25 mA. |
| 4 | OUTX | output | NAND gate output (low only when both inputs are high); output current ±25 mA max, output voltage -0.5 to VCC+0.5 V. |
| 5 | VCC | power_in | Positive supply, recommended 2.0 to 6.0 V (absolute maximum -0.5 to +7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-23-5 |
| Category | Logic |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
TC7S00F - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tc7s00f-etched.step/tc7s00f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tc7s00f.step/tc7s00f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TECH PUBLIC datasheet (5 pp, sha256
6d8e8e83f995efb2, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TC7S00F
**TECH PUBLIC** · Logic Gates · SOT-23-5
TC7S00F from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INB | input | Gate input B of the 2-input NAND; input voltage range 0 to VCC (abs max -0.5 to VCC+0.5 V). |
| 2 | INA | input | Gate input A of the 2-input NAND; input voltage range 0 to VCC (abs max -0.5 to VCC+0.5 V). |
| 3 | GND | power_in | Ground reference, 0 V; max VCC/GND current ±25 mA. |
| 4 | OUTX | output | NAND gate output (low only when both inputs are high); output current ±25 mA max, output voltage -0.5 to VCC+0.5 V. |
| 5 | VCC | power_in | Positive supply, recommended 2.0 to 6.0 V (absolute maximum -0.5 to +7.0 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-23-5 |
| Category | Logic |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `TC7S00F`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tc7s00f-etched.step` / `tc7s00f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tc7s00f.step` / `tc7s00f.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603395548653506560) (5 pp, sha256 `6d8e8e83f995efb2`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tc7s00f-datasheet.pdf)