component
TC7652CPD
Public Made by Adomby adom
Microchip Tech Precision OpAmps, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTC7652CPD
Microchip Tech · Precision OpAmps · PDIP-14
TC7652CPD from Microchip Tech, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CB | passive | Null storage capacitor pin; the datasheet recommends 0.1µF to 1µF film capacitors connected to CRETN (pin 8) on the 14-pin device. |
| 2 | CA | passive | Null storage capacitor pin; the datasheet recommends 0.1µF to 1µF film capacitors connected to CRETN (pin 8) on the 14-pin device. |
| 3 | NC | unconnected | No internal connection; can be used as an input guard ring pin next to the inputs. |
| 4 | -INPUT | input | Inverting input of the chopper-stabilized amplifier; input bias current is 15pA typical with CLK off at 25°C. |
| 5 | +INPUT | input | Non-inverting input of the chopper-stabilized amplifier; common mode voltage range is -4.3V to +3.5V. |
| 6 | NC | unconnected | No internal connection; can be used as an input guard ring pin next to the inputs. |
| 7 | VSS | power_in | Negative power supply; operating supply range is 5V to 16V total (VDD to VSS) with a maximum total supply of +18V. |
| 8 | CRETN | passive | Capacitor current return pin; connect the null storage capacitors to this pin on the 14-pin device. |
| 9 | OUTPUT CLAMP | passive | Output voltage clamp pin that reduces overload recovery time when connected to the inverting input. |
| 10 | OUTPUT | output | Amplifier output; the output is short-circuit protected indefinitely and drives at least 10kΩ loads for full swing. |
| 11 | VDD | power_in | Positive power supply; operating supply range is 5V to 16V total (VDD to VSS) with a maximum total supply of +18V. |
| 12 | INT CLK OUT | output | Internal chopping clock output at 275Hz on the 14-pin device. |
| 13 | EXT CLK IN | input | External clock input used when INT/EXT (pin 14) is tied to VSS; the external clock can swing between VDD and VSS. |
| 14 | INT/EXT | input | Clock source select; has an internal pull-up and can be left open for internal clock operation, or tied to VSS to use an external clock. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | PDIP-14 |
| Category | Operational Amplifier/Comparator |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Total Supply Voltage (VDD to VSS) | 18 | V | 3 | ||||
| Current Into Any Pin | 10 | mA | 3 | ||||
| Input Current While Operating | 100 | µA | While Operating (Note 1) | 3 | |||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| Operating Temperature Range C Device | 0 | 70 | °C | C device | 3 | ||
| Operating Supply Range | VDD, VSS | 5 | 16 | V | 3 | ||
| Input Offset Voltage | VOS | 2 | 5 | µV | TA = +25°C | 3 | |
| Average Temperature Coefficient of Input Offset Voltage | TCVOS | 0.01 | 0.05 | V/°C | 0°C < TA < +70°C | 3 | |
| Input Bias Current (CLK On) | IBIAS | 30 | 100 | pA | TA = +25°C | 3 | |
| Input Bias Current (CLK On) | IBIAS | 100 | pA | 0°C < TA < +70°C | 3 | ||
| Input Bias Current (CLK On) | IBIAS | 250 | 1000 | pA | -25°C < TA < +85°C | 3 | |
| Input Bias Current (CLK Off) | IBIAS | 15 | 30 | pA | TA = +25°C | 3 | |
| Input Bias Current (CLK Off) | IBIAS | 35 | pA | 0°C < TA < +70°C | 3 | ||
| Input Bias Current (CLK Off) | IBIAS | 100 | 1000 | pA | -25°C < TA < +85°C | 3 | |
| Input Offset Current | IOS | 25 | 150 | pA | 3 | ||
| Large Signal Voltage Gain | OL | 120 | 150 | dB | RL = 10k, VOUT = ±4V | 3 | |
| Output Voltage Swing | VOUT | -4.7 | 4.7 | V | VRL = 10k | 3 | |
| Output Voltage Swing | VOUT | -4.85 | 4.95 | V | RL = 100k | 3 | |
| Common Mode Voltage Range | CMVR | -4.3 | 3.5 | V | 3 | ||
| Common Mode Rejection Ratio | MRR | 120 | 140 | dB | CMVR = -4.3V to +3.5V | 3 | |
| Power Supply Rejection Ratio | PSRR | 120 | 140 | dB | ±3V to ±8V | 3 | |
| Input Noise Voltage | eN | 0.2 | 1.5 | VP-P | RS = 100, DC to 1Hz | 3 | |
| Input Noise Voltage | eN | 0.7 | 5 | VP-P | DC to 10Hz | 3 | |
| Supply Current | IS | 1 | 3 | mA | No Load | 4 | |
| Internal Chopping Frequency | fCH | 100 | 275 | Hz | Pins 12, 14 Open (DIP) | 4 | |
| Clamp ON Current | 25 | 100 | µA | RL = 100k | 4 |
CAD (KiCad official)
- Symbol:
TC7652CPD - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files:
tc7652cpd-etched.step/tc7652cpd-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tc7652cpd.step/tc7652cpd.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (18 pp, sha256
52df12ac39ef5a86, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).