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TC74VHC595F

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TOSHIBA Shift Registers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TC74VHC595F

TOSHIBA · Shift Registers · SOP-16

TC74VHC595F from TOSHIBA, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 QB tri_state 3-state parallel output B of the storage register, enabled when G is low.
2 QC tri_state 3-state parallel output C of the storage register, enabled when G is low.
3 QD tri_state 3-state parallel output D of the storage register, enabled when G is low.
4 QE tri_state 3-state parallel output E of the storage register, enabled when G is low.
5 QF tri_state 3-state parallel output F of the storage register, enabled when G is low.
6 QG tri_state 3-state parallel output G of the storage register, enabled when G is low.
7 QH tri_state 3-state parallel output H of the storage register, enabled when G is low.
8 GND power_in Ground pin (0 V reference).
9 QH' output Serial data output from the last shift register stage, not 3-state, for cascading devices.
10 SCLR input Active-low asynchronous shift register clear; a low level clears the shift register; input range 0 to 5.5 V.
11 SCK input Shift register clock; data shifts on the positive-going transition; input range 0 to 5.5 V.
12 RCK input Storage register clock; shift register data is loaded into the storage register on the positive-going transition; input range 0 to 5.5 V.
13 G input Output enable; high disables (3-state) QA thru QH outputs, low enables them; input range 0 to 5.5 V.
14 SI input Serial data input to the first shift register stage; input range 0 to 5.5 V.
15 QA tri_state 3-state parallel output A of the storage register, enabled when G is low.
16 VCC power_in Positive supply voltage, operating range 2.0 to 5.5 V.

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 4
DC input voltage VIN -0.5 7 V 4
DC output voltage VOUT -0.5 V -0.5 to VCC + 0.5 4
Input diode current IIK -20 mA 4
Output diode current IOK -20 20 mA 4
DC output current IOUT -25 25 mA 4
DC VCC/ground current ICC -75 75 mA 4
Power dissipation PD 180 mW 4
Storage temperature Tstg -65 150 °C 4
Supply voltage VCC 2 5.5 V 4
Input voltage VIN 0 5.5 V 4
Output voltage VOUT 0 V 0 to VCC 4
Operating temperature Topr -40 85 °C 4
Input rise and fall time dt/dv 0 100 ns/V VCC = 3.3 ± 0.3 V 4
Input rise and fall time dt/dv 0 20 ns/V VCC = 5 ± 0.5 V 4
High-level input voltage VIH 1.5 V VCC = 2.0 V, Ta = 25°C and -40 to 85°C 5
Low-level input voltage VIL 0.5 V VCC = 2.0 V, Ta = 25°C and -40 to 85°C 5
High-level output voltage VOH 1.9 2 V VIN = VIH or VIL, IOH = -50 μA, VCC = 2.0 V, Ta = 25°C 5
High-level output voltage VOH 2.9 3 V VIN = VIH or VIL, IOH = -50 μA, VCC = 3.0 V, Ta = 25°C 5
High-level output voltage VOH 4.4 4.5 V VIN = VIH or VIL, IOH = -50 μA, VCC = 4.5 V, Ta = 25°C 5
High-level output voltage VOH 2.58 V VIN = VIH or VIL, IOH = -4 mA, VCC = 3.0 V, Ta = 25°C 5
High-level output voltage VOH 3.94 V VIN = VIH or VIL, IOH = -8 mA, VCC = 4.5 V, Ta = 25°C 5
High-level output voltage VOH 2.48 V VIN = VIH or VIL, IOH = -4 mA, VCC = 3.0 V, Ta = -40 to 85°C 5
High-level output voltage VOH 3.8 V VIN = VIH or VIL, IOH = -8 mA, VCC = 4.5 V, Ta = -40 to 85°C 5
Low-level output voltage VOL 0 0.1 V VIN = VIH or VIL, IOL = 50 μA, VCC = 2.0/3.0/4.5 V, Ta = 25°C 5
Low-level output voltage VOL 0.1 V VIN = VIH or VIL, IOL = 50 μA, VCC = 2.0/3.0/4.5 V, Ta = -40 to 85°C 5
Low-level output voltage VOL 0.36 V VIN = VIH or VIL, IOL = 4 mA, VCC = 3.0 V / IOL = 8 mA, VCC = 4.5 V, Ta = 25°C 5
Low-level output voltage VOL 0.44 V VIN = VIH or VIL, IOL = 4 mA, VCC = 3.0 V / IOL = 8 mA, VCC = 4.5 V, Ta = -40 to 85°C 5
3-state output off-state current IOZ -0.25 0.25 μA VIN = VIH or VIL, VOUT = VCC or GND, VCC = 5.5 V, Ta = 25°C 5
3-state output off-state current IOZ -2.5 2.5 μA VIN = VIH or VIL, VOUT = VCC or GND, VCC = 5.5 V, Ta = -40 to 85°C 5
Input leakage current IIN -0.1 0.1 μA VIN = 5.5 V or GND, VCC = 0 to 5.5 V, Ta = 25°C 5
Input leakage current IIN -1 1 μA VIN = 5.5 V or GND, VCC = 0 to 5.5 V, Ta = -40 to 85°C 5
Quiescent supply current ICC 4 μA VIN = VCC or GND, VCC = 5.5 V, Ta = 25°C 5
Quiescent supply current ICC 40 μA VIN = VCC or GND, VCC = 5.5 V, Ta = -40 to 85°C 5
Minimum pulse width (SCK, RCK) tw(H), tw(L) 5 ns VCC = 3.3 ± 0.3 V and 5.0 ± 0.5 V, limit 6
Minimum set-up time (SI-SCK) ts 3.5 ns VCC = 3.3 ± 0.3 V, limit 6
Minimum set-up time (SI-SCK) ts 3 ns VCC = 5.0 ± 0.5 V, limit 6
Minimum set-up time (SCK-RCK) ts 8.5 ns VCC = 3.3 ± 0.3 V, Ta = -40 to 85°C limit 6
Minimum hold time (SI-SCK) th 1.5 ns VCC = 3.3 ± 0.3 V, limit 6
Minimum removal time (SCLR) trem 3 ns VCC = 3.3 ± 0.3 V, limit 6
Propagation delay time (SCK-QH') tpLH/tpHL 8.8 13 ns VCC = 3.3 ± 0.3 V, CL = 15 pF, Ta = 25°C 7
Propagation delay time (SCK-QH') tpLH/tpHL 6.2 8.2 ns VCC = 5.0 ± 0.5 V, CL = 15 pF, Ta = 25°C 7
Propagation delay time (RCK-Qn) tpLH/tpHL 7.7 11.9 ns VCC = 3.3 ± 0.3 V, CL = 15 pF, Ta = 25°C 7
Propagation delay time (RCK-Qn) tpLH/tpHL 5.4 7.4 ns VCC = 5.0 ± 0.5 V, CL = 15 pF, Ta = 25°C 7
Output enable time tpZL/tpZH 7.5 11.5 ns RL = 1 kΩ, VCC = 3.3 ± 0.3 V, CL = 15 pF, Ta = 25°C 7
Output disable time tpLZ/tpHZ 7.6 10.3 ns RL = 1 kΩ, VCC = 5.0 ± 0.5 V, CL = 50 pF, Ta = 25°C 7
Maximum clock frequency fmax 80 150 MHz VCC = 3.3 ± 0.3 V, CL = 15 pF, Ta = 25°C 7
Maximum clock frequency fmax 135 185 MHz VCC = 5.0 ± 0.5 V, CL = 15 pF, Ta = 25°C 7
Maximum clock frequency fmax 85 MHz VCC = 5.0 ± 0.5 V, CL = 50 pF, Ta = -40 to 85°C 7
Input capacitance CIN 4 10 pF Ta = 25°C 7
Output capacitance COUT 6 pF Ta = 25°C 7
Power dissipation capacitance CPD 87 pF Ta = 25°C 7
Quiet output maximum dynamic VOL VOLP 0.8 1 V CL = 50 pF, VCC = 5.0 V, Ta = 25°C 8
Quiet output minimum dynamic VOL VOLV -1 -0.8 V CL = 50 pF, VCC = 5.0 V, Ta = 25°C 8
Minimum high level dynamic input voltage VIHD 3.5 V CL = 50 pF, VCC = 5.0 V, Ta = 25°C 8
Maximum low level dynamic input voltage VILD 1.5 V CL = 50 pF, VCC = 5.0 V, Ta = 25°C 8

CAD (KiCad official)

  • Symbol: TC74VHC595F
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: tc74vhc595f-etched.step / tc74vhc595f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tc74vhc595f.step / tc74vhc595f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (10 pp, sha256 a4b99fdb5df49bae, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF