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Contents

README

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TC74VHC541F

TOSHIBA · Buffers, Drivers, Receivers, Transceivers · SOP-20

TC74VHC541F from TOSHIBA, in a SOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G1 input Active-low output enable 1; when G1 or G2 is high the Y outputs are in the high-impedance state.
2 A1 input Data input 1, accepts 0 to 5.5 V regardless of supply voltage.
3 A2 input Data input 2, accepts 0 to 5.5 V regardless of supply voltage.
4 A3 input Data input 3, accepts 0 to 5.5 V regardless of supply voltage.
5 A4 input Data input 4, accepts 0 to 5.5 V regardless of supply voltage.
6 A5 input Data input 5, accepts 0 to 5.5 V regardless of supply voltage.
7 A6 input Data input 6, accepts 0 to 5.5 V regardless of supply voltage.
8 A7 input Data input 7, accepts 0 to 5.5 V regardless of supply voltage.
9 A8 input Data input 8, accepts 0 to 5.5 V regardless of supply voltage.
10 GND power_in Ground (0 V) reference.
11 Y8 tri_state Non-inverting 3-state output 8 following A8, high-impedance when G1 or G2 is high.
12 Y7 tri_state Non-inverting 3-state output 7 following A7, high-impedance when G1 or G2 is high.
13 Y6 tri_state Non-inverting 3-state output 6 following A6, high-impedance when G1 or G2 is high.
14 Y5 tri_state Non-inverting 3-state output 5 following A5, high-impedance when G1 or G2 is high.
15 Y4 tri_state Non-inverting 3-state output 4 following A4, high-impedance when G1 or G2 is high.
16 Y3 tri_state Non-inverting 3-state output 3 following A3, high-impedance when G1 or G2 is high.
17 Y2 tri_state Non-inverting 3-state output 2 following A2, high-impedance when G1 or G2 is high.
18 Y1 tri_state Non-inverting 3-state output 1 following A1, high-impedance when G1 or G2 is high.
19 G2 input Active-low output enable 2; when G1 or G2 is high the Y outputs are in the high-impedance state.
20 VCC power_in Supply voltage, operating range 2.0 to 5.5 V.

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: TC74VHC541F
  • Footprint: Package_SO:SOP-20_7.5x12.8mm_P1.27mm
  • 3D model: SOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tc74vhc541f-etched.step / tc74vhc541f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tc74vhc541f.step / tc74vhc541f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (9 pp, sha256 48467a20f5a945a4, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF