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TC74VHC32F

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TOSHIBA Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TC74VHC32F

TOSHIBA · Logic Gates · SOP-14

TC74VHC32F from TOSHIBA, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A of gate 1; inputs tolerate 0 to 5.5 V regardless of supply voltage and are power-down protected.
2 1B input Input B of gate 1; inputs tolerate 0 to 5.5 V regardless of supply voltage and are power-down protected.
3 1Y output Output of gate 1 (2-input OR); buffered output.
4 2A input Input A of gate 2; inputs tolerate 0 to 5.5 V regardless of supply voltage and are power-down protected.
5 2B input Input B of gate 2; inputs tolerate 0 to 5.5 V regardless of supply voltage and are power-down protected.
6 2Y output Output of gate 2 (2-input OR); buffered output.
7 GND power_in Ground reference for the device.
8 3Y output Output of gate 3 (2-input OR); buffered output.
9 3A input Input A of gate 3; inputs tolerate 0 to 5.5 V regardless of supply voltage and are power-down protected.
10 3B input Input B of gate 3; inputs tolerate 0 to 5.5 V regardless of supply voltage and are power-down protected.
11 4Y output Output of gate 4 (2-input OR); buffered output.
12 4A input Input A of gate 4; inputs tolerate 0 to 5.5 V regardless of supply voltage and are power-down protected.
13 4B input Input B of gate 4; inputs tolerate 0 to 5.5 V regardless of supply voltage and are power-down protected.
14 VCC power_in Positive supply; operating range 2.0 to 5.5 V.

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 2
DC input voltage VIN -0.5 7 V 2
DC output voltage VOUT -0.5 V 2
Input diode current IIK -20 mA 2
Output diode current IOK -20 20 mA 2
DC output current IOUT -25 25 mA 2
DC VCC/ground current ICC -50 50 mA 2
Power dissipation PD 180 mW 2
Storage temperature Tstg -65 150 °C 2
Supply voltage VCC 2 5.5 V 3
Input voltage VIN 0 5.5 V 3
Output voltage VOUT 0 V 3
Operating temperature Topr -40 85 °C 3
Input rise and fall time dt/dv 0 100 ns/V VCC = 3.3 ± 0.3 V 3
Input rise and fall time dt/dv 0 20 ns/V VCC = 5 ± 0.5 V 3
High-level input voltage VIH 1.5 V VCC = 2.0 V, Ta = 25°C 3
Low-level input voltage VIL 0.5 V VCC = 2.0 V, Ta = 25°C 3
High-level output voltage VOH 1.9 2 V VCC = 2.0 V; VIN = VIH or VIL; IOH = −50 μA; Ta = 25°C 3
High-level output voltage VOH 1.9 V VCC = 2.0 V; VIN = VIH or VIL; IOH = −50 μA; Ta = −40 to 85°C 3
High-level output voltage VOH 2.9 3 V VCC = 3.0 V; VIN = VIH or VIL; IOH = −50 μA; Ta = 25°C 3
High-level output voltage VOH 2.9 V VCC = 3.0 V; VIN = VIH or VIL; IOH = −50 μA; Ta = −40 to 85°C 3
High-level output voltage VOH 4.4 4.5 V VCC = 4.5 V; VIN = VIH or VIL; IOH = −50 μA; Ta = 25°C 3
High-level output voltage VOH 4.4 V VCC = 4.5 V; VIN = VIH or VIL; IOH = −50 μA; Ta = −40 to 85°C 3
High-level output voltage VOH 2.58 V VCC = 3.0 V; VIN = VIH or VIL; IOH = −4 mA; Ta = 25°C 3
High-level output voltage VOH 2.48 V VCC = 3.0 V; VIN = VIH or VIL; IOH = −4 mA; Ta = −40 to 85°C 3
High-level output voltage VOH 3.94 V VCC = 4.5 V; VIN = VIH or VIL; IOH = −8 mA; Ta = 25°C 3
High-level output voltage VOH 3.8 V VCC = 4.5 V; VIN = VIH or VIL; IOH = −8 mA; Ta = −40 to 85°C 3
Low-level output voltage VOL 0 0.1 V VCC = 2.0 V; VIN = VIL; IOL = 50 μA; Ta = 25°C 3
Low-level output voltage VOL 0.1 V VCC = 2.0 V; VIN = VIL; IOL = 50 μA; Ta = −40 to 85°C 3
Low-level output voltage VOL 0.36 V VCC = 3.0 V; VIN = VIL; IOL = 4 mA; Ta = 25°C 3
Low-level output voltage VOL 0.44 V VCC = 3.0 V; VIN = VIL; IOL = 4 mA; Ta = −40 to 85°C 3
Input leakage current IIN -0.1 0.1 μA VIN = 5.5 V or GND; VCC = 0 to 5.5 V; Ta = 25°C 3
Input leakage current IIN -1 1 μA VIN = 5.5 V or GND; VCC = 0 to 5.5 V; Ta = −40 to 85°C 3
Quiescent supply current ICC 2 μA VIN = VCC or GND; VCC = 5.5 V; Ta = 25°C 3
Quiescent supply current ICC 20 μA VIN = VCC or GND; VCC = 5.5 V; Ta = −40 to 85°C 3
Propagation delay time tpLH, tpHL 5.5 7.9 ns VCC = 3.3 ± 0.3 V; CL = 15 pF; Ta = 25°C 4
Propagation delay time tpLH, tpHL 1 9.5 ns VCC = 3.3 ± 0.3 V; CL = 15 pF; Ta = −40 to 85°C 4
Propagation delay time tpLH, tpHL 8 11.4 ns VCC = 3.3 ± 0.3 V; CL = 50 pF; Ta = 25°C 4
Propagation delay time tpLH, tpHL 1 13 ns VCC = 3.3 ± 0.3 V; CL = 50 pF; Ta = −40 to 85°C 4
Propagation delay time tpLH, tpHL 3.8 5.5 ns VCC = 5.0 ± 0.5 V; CL = 15 pF; Ta = 25°C 4
Propagation delay time tpLH, tpHL 1 6.5 ns VCC = 5.0 ± 0.5 V; CL = 15 pF; Ta = −40 to 85°C 4
Propagation delay time tpLH, tpHL 5.3 7.5 ns VCC = 5.0 ± 0.5 V; CL = 50 pF; Ta = 25°C 4
Propagation delay time tpLH, tpHL 1 8.5 ns VCC = 5.0 ± 0.5 V; CL = 50 pF; Ta = −40 to 85°C 4
Input capacitance CIN 4 10 pF Ta = 25°C 4
Input capacitance CIN 10 pF Ta = −40 to 85°C 4
Quiet output maximum dynamic VOL VOLP 0.3 0.8 V CL = 50 pF; VCC = 5.0 V; Ta = 25°C 4
Quiet output minimum dynamic VOL VOLV -0.8 -0.3 V CL = 50 pF; VCC = 5.0 V; Ta = 25°C 4
Minimum high level dynamic input voltage VIHD 3.5 V CL = 50 pF; VCC = 5.0 V; Ta = 25°C 4
Maximum low level dynamic input voltage VILD 1.5 V CL = 50 pF; VCC = 5.0 V; Ta = 25°C 4

CAD (KiCad official)

  • Symbol: TC74VHC32F
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: tc74vhc32f-etched.step / tc74vhc32f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tc74vhc32f.step / tc74vhc32f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (7 pp, sha256 a177f7cda5184270, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF