component

TC74HCT7007AF-ELF

Public Made by Adom

by adom

TOSHIBA Buffers, Drivers, Receivers, Transceivers, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogictc74hct7007af-elffactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7h ago
viewers tc74hct7007af-elf: viewers · Ray 7h ago
package.json Publish 0.1.0 · Ray 7h ago
page.json Set visibility: public · Ray 7h ago
README.md Publish 0.1.0 · Ray 7h ago
tc74hct7007af-elf-etched.glb Publish 0.1.0 · Ray 7h ago
tc74hct7007af-elf-etched.step tc74hct7007af-elf: factory component page (tier=lcsc) · Ray 7h ago
tc74hct7007af-elf-hero.glb tc74hct7007af-elf: hero GLB from the etched model (keeps the MPN mark) · Ray 7h ago
tc74hct7007af-elf-hero.overlay.json Publish 0.1.0 · Ray 7h ago
tc74hct7007af-elf.glb Publish 0.1.0 · Ray 7h ago
tc74hct7007af-elf.kicad_mod Publish 0.1.0 · Ray 7h ago
tc74hct7007af-elf.kicad_sym Publish 0.1.0 · Ray 7h ago
tc74hct7007af-elf.lbr Publish 0.1.0 · Ray 7h ago
tc74hct7007af-elf.step Publish 0.1.0 · Ray 7h ago

TC74HCT7007AF-ELF

TOSHIBA · Buffers, Drivers, Receivers, Transceivers · SOP-14

TC74HCT7007AF-ELF from TOSHIBA, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Buffer 1 input, TTL/NMOS/CMOS compatible (VIH 2 V min, VIL 0.8 V max); tie to VCC or GND if unused.
2 1Y output Buffer 1 output, drives 10 LSTTL loads with
3 2A input Buffer 2 input, TTL/NMOS/CMOS compatible (VIH 2 V min, VIL 0.8 V max); tie to VCC or GND if unused.
4 2Y output Buffer 2 output, drives 10 LSTTL loads with
5 3A input Buffer 3 input, TTL/NMOS/CMOS compatible (VIH 2 V min, VIL 0.8 V max); tie to VCC or GND if unused.
6 3Y output Buffer 3 output, drives 10 LSTTL loads with
7 GND power_in Ground reference (0 V).
8 4Y output Buffer 4 output, drives 10 LSTTL loads with
9 4A input Buffer 4 input, TTL/NMOS/CMOS compatible (VIH 2 V min, VIL 0.8 V max); tie to VCC or GND if unused.
10 5Y output Buffer 5 output, drives 10 LSTTL loads with
11 5A input Buffer 5 input, TTL/NMOS/CMOS compatible (VIH 2 V min, VIL 0.8 V max); tie to VCC or GND if unused.
12 6Y output Buffer 6 output, drives 10 LSTTL loads with
13 6A input Buffer 6 input, TTL/NMOS/CMOS compatible (VIH 2 V min, VIL 0.8 V max); tie to VCC or GND if unused.
14 VCC power_in Positive supply, operating range 4.5 to 5.5 V (absolute max -0.5 to 7 V).

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 2
DC input voltage VIN -0.5 V 2
DC output voltage VOUT -0.5 V 2
Input diode current IIK -20 20 mA 2
Output diode current IOK -20 20 mA 2
DC output current IOUT -25 25 mA 2
DC VCC/ground current ICC -50 50 mA 2
Power dissipation PD 180 mW SOP package 2
Storage temperature Tstg -65 150 °C 2
Supply voltage VCC 4.5 5.5 V 2
Input voltage VIN 0 V 2
Output voltage VOUT 0 V 2
Operating temperature Topr -40 85 °C 2
Input rise and fall time tr, tf 0 500 ns 2
High-level input voltage VIH 2 V VCC 4.5 to 5.5 V, Ta = 25°C 3
Low-level input voltage VIL 0.8 V VCC 4.5 to 5.5 V, Ta = 25°C 3
High-level output voltage VOH 4.4 4.5 V IOH = −20 μA, VCC = 4.5 V, Ta = 25°C 3
High-level output voltage VOH 4.4 V IOH = −20 μA, VCC = 4.5 V, Ta = −40 to 85°C 3
High-level output voltage VOH 4.18 4.31 V VIN = VIH or VIL, IOH = −4 mA, VCC = 4.5 V, Ta = 25°C 3
High-level output voltage VOH 4.13 V VIN = VIH or VIL, IOH = −4 mA, VCC = 4.5 V, Ta = −40 to 85°C 3
Low-level output voltage VOL 0 0.1 V VIN = VIH or VIL, IOL = 20 μA, VCC = 4.5 V, Ta = 25°C 3
Low-level output voltage VOL 0.1 V VIN = VIH or VIL, IOL = 20 μA, VCC = 4.5 V, Ta = −40 to 85°C 3
Low-level output voltage VOL 0.17 0.26 V VIN = VIH or VIL, IOL = 4 mA, VCC = 4.5 V, Ta = 25°C 3
Low-level output voltage VOL 0.33 V VIN = VIH or VIL, IOL = 4 mA, VCC = 4.5 V, Ta = −40 to 85°C 3
Input leakage current IIN -0.1 0.1 μA VIN = VCC or GND, VCC = 5.5 V, Ta = 25°C 3
Input leakage current IIN -1 1 μA VIN = VCC or GND, VCC = 5.5 V, Ta = −40 to 85°C 3
Quiescent supply current ICC 1 μA VIN = VCC or GND, VCC = 5.5 V, Ta = 25°C 3
Quiescent supply current ICC 10 μA VIN = VCC or GND, VCC = 5.5 V, Ta = −40 to 85°C 3
Quiescent supply current per input ICC 2 mA Per input VIN = 0.5 V or 2.4 V, other input VCC or GND, VCC = 5.5 V, Ta = 25°C 3
Quiescent supply current per input ICC 2.9 mA Per input VIN = 0.5 V or 2.4 V, other input VCC or GND, VCC = 5.5 V, Ta = −40 to 85°C 3
Output transition time tTLH, tTHL 6 12 ns CL = 15 pF, VCC = 5 V, Ta = 25°C, tr = tf = 6 ns 3
Propagation delay time tpLH, tpHL 11 17 ns CL = 15 pF, VCC = 5 V, Ta = 25°C, tr = tf = 6 ns 3
Output transition time tTLH, tTHL 8 15 ns CL = 50 pF, VCC = 4.5 V, Ta = 25°C, tr = tf = 6 ns 3
Output transition time tTLH, tTHL 19 ns CL = 50 pF, VCC = 4.5 V, Ta = −40 to 85°C, tr = tf = 6 ns 3
Output transition time tTLH, tTHL 7 14 ns CL = 50 pF, VCC = 5.5 V, Ta = 25°C, tr = tf = 6 ns 3
Output transition time tTLH, tTHL 18 ns CL = 50 pF, VCC = 5.5 V, Ta = −40 to 85°C, tr = tf = 6 ns 3
Propagation delay time tpLH, tpHL 14 23 ns CL = 50 pF, VCC = 4.5 V, Ta = 25°C, tr = tf = 6 ns 3
Propagation delay time tpLH, tpHL 28 ns CL = 50 pF, VCC = 4.5 V, Ta = −40 to 85°C, tr = tf = 6 ns 3
Propagation delay time tpLH, tpHL 12 21 ns CL = 50 pF, VCC = 5.5 V, Ta = 25°C, tr = tf = 6 ns 3
Propagation delay time tpLH, tpHL 26 ns CL = 50 pF, VCC = 5.5 V, Ta = −40 to 85°C, tr = tf = 6 ns 3
Input capacitance CIN 5 10 pF 3
Power dissipation capacitance CPD 22 pF Note: without load 3

CAD (KiCad official)

  • Symbol: TC74HCT7007AF-ELF
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: tc74hct7007af-elf-etched.step / tc74hct7007af-elf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tc74hct7007af-elf.step / tc74hct7007af-elf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (6 pp, sha256 cd1df0c9293c0586, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF