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TC74HC00APF

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TOSHIBA Logic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TC74HC00APF

TOSHIBA · Logic Gates · DIP-14

TC74HC00APF from TOSHIBA, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 input A; unused inputs must be tied to VCC or GND.
2 1B input Gate 1 input B; unused inputs must be tied to VCC or GND.
3 1Y output Gate 1 NAND output, drives 10 LSTTL loads with
4 2A input Gate 2 input A; unused inputs must be tied to VCC or GND.
5 2B input Gate 2 input B; unused inputs must be tied to VCC or GND.
6 2Y output Gate 2 NAND output, drives 10 LSTTL loads with
7 GND power_in Ground pin (0 V reference).
8 3Y output Gate 3 NAND output, drives 10 LSTTL loads with
9 3A input Gate 3 input A; unused inputs must be tied to VCC or GND.
10 3B input Gate 3 input B; unused inputs must be tied to VCC or GND.
11 4Y output Gate 4 NAND output, drives 10 LSTTL loads with
12 4A input Gate 4 input A; unused inputs must be tied to VCC or GND.
13 4B input Gate 4 input B; unused inputs must be tied to VCC or GND.
14 VCC power_in Supply voltage, operating range 2 to 6 V (absolute maximum -0.5 to 7 V).

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package DIP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 2
DC input voltage VIN -0.5 V upper limit printed as VCC + 0.5 V 2
DC output voltage VOUT -0.5 V upper limit printed as VCC + 0.5 V 2
Input diode current IIK -20 20 mA 2
Output diode current IOK -20 20 mA 2
DC output current IOUT -25 25 mA 2
DC VCC/ground current ICC -50 50 mA 2
Power dissipation PD 500 mW DIP package, Ta = −40 to 65°C (Note 2) 2
Storage temperature Tstg -65 150 °C 2
Supply voltage VCC 2 6 V 2
Input voltage VIN 0 V upper limit printed as VCC 2
Output voltage VOUT 0 V upper limit printed as VCC 2
Operating temperature Topr -40 85 °C 2
Input rise and fall time tr, tf 0 1000 ns VCC = 2.0 V 2
Input rise and fall time tr, tf 0 500 ns VCC = 4.5 V 2
Input rise and fall time tr, tf 0 400 ns VCC = 6.0 V 2
High-level input voltage VIH 1.5 V VCC = 2.0 V, Ta = −40 to 85°C 3
High-level input voltage VIH 3.15 V VCC = 4.5 V, Ta = −40 to 85°C 3
High-level input voltage VIH 4.2 V VCC = 6.0 V, Ta = −40 to 85°C 3
Low-level input voltage VIL 0.5 V VCC = 2.0 V, Ta = −40 to 85°C 3
Low-level input voltage VIL 1.35 V VCC = 4.5 V, Ta = −40 to 85°C 3
Low-level input voltage VIL 1.8 V VCC = 6.0 V, Ta = −40 to 85°C 3
High-level output voltage VOH 1.9 V IOH = −20 µA, VIN = VIH or VIL, VCC = 2.0 V, Ta = −40 to 85°C 3
High-level output voltage VOH 4.4 V IOH = −20 µA, VIN = VIH or VIL, VCC = 4.5 V, Ta = −40 to 85°C 3
High-level output voltage VOH 5.9 V IOH = −20 µA, VIN = VIH or VIL, VCC = 6.0 V, Ta = −40 to 85°C 3
High-level output voltage VOH 4.13 V IOH = −4 mA, VIN = VIH or VIL, VCC = 4.5 V, Ta = −40 to 85°C 3
High-level output voltage VOH 5.63 V IOH = −5.2 mA, VIN = VIH or VIL, VCC = 6.0 V, Ta = −40 to 85°C 3
Low-level output voltage VOL 0.1 V IOL = 20 µA, VIN = VIH or VIL, VCC = 2.0 V, Ta = −40 to 85°C 3
Low-level output voltage VOL 0.33 V IOL = 4 mA, VIN = VIH or VIL, VCC = 4.5 V, Ta = −40 to 85°C 3
Input leakage current IIN -1 1 µA VIN = VCC or GND, VCC = 6.0 V, Ta = −40 to 85°C 3
Quiescent supply current ICC 10 µA VIN = VCC or GND, VCC = 6.0 V, Ta = −40 to 85°C 3
Output transition time tTLH, tTHL 4 8 ns CL = 15 pF, VCC = 5 V, Ta = 25°C, input tr = tf = 6 ns 3
Propagation delay time tpLH, tpHL 6 12 ns CL = 15 pF, VCC = 5 V, Ta = 25°C, input tr = tf = 6 ns 3
Output transition time tTLH, tTHL 25 95 ns CL = 50 pF, VCC = 2.0 V, input tr = tf = 6 ns (typ at Ta = 25°C) 4
Output transition time tTLH, tTHL 7 19 ns CL = 50 pF, VCC = 4.5 V, input tr = tf = 6 ns (typ at Ta = 25°C) 4
Output transition time tTLH, tTHL 6 16 ns CL = 50 pF, VCC = 6.0 V, input tr = tf = 6 ns (typ at Ta = 25°C) 4
Propagation delay time tpLH, tpHL 27 95 ns CL = 50 pF, VCC = 2.0 V, input tr = tf = 6 ns (typ at Ta = 25°C) 4
Propagation delay time tpLH, tpHL 9 19 ns CL = 50 pF, VCC = 4.5 V, input tr = tf = 6 ns (typ at Ta = 25°C) 4
Propagation delay time tpLH, tpHL 8 16 ns CL = 50 pF, VCC = 6.0 V, input tr = tf = 6 ns (typ at Ta = 25°C) 4
Input capacitance CIN 5 10 pF 4

CAD (KiCad official)

  • Symbol: TC74HC00APF
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: tc74hc00apf-etched.step / tc74hc00apf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tc74hc00apf.step / tc74hc00apf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (8 pp, sha256 1ad6e97caf88e768, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF