component
TC7340
Public Made by Adomby adom
Shenzhen Fuman AC-DC Controllers & Regulators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TC7340
Shenzhen Fuman · AC-DC Controllers & Regulators · DIP-8
TC7340 from Shenzhen Fuman, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD-G | power_in | Internal gate-driver supply terminal; the datasheet gives an absolute maximum input voltage of -0.3 V to 30 V and says gate drive strength can be tuned by a resistor between VDD and VDD-G. |
| 2 | VDD | power_in | Main supply pin, normally powered from the transformer auxiliary winding; it is rated -0.3 V to 30 V absolute maximum, clamps at 30.5 V typical at 10 mA, and enters UVLO at 8.4-10.4 V (on) and 14.2-16.2 V (off). |
| 3 | FB | input | Feedback input for the PWM duty-cycle control and overload detection; absolute maximum voltage is -0.3 V to 7 V, with 4.9 V typical open-circuit voltage and an overload threshold of 3.85 V. |
| 4 | SENSE | input | Current-sense input for peak-current limiting and cycle-by-cycle protection; absolute maximum voltage is -0.3 V to 7 V, with an overcurrent threshold of 0.77 V typical (0.72-0.82 V) and 40 kΩ input impedance. |
| 5 | DRAIN | output | Drain of the internal high-voltage power MOSFET; rated 650 V breakdown (absolute maximum drain voltage -0.3 V to 650 V), 2.2 Ω typical RDS(on), and 2 A peak drain current. |
| 6 | DRAIN | output | Drain of the internal high-voltage power MOSFET, bonded in parallel with pin 5; rated 650 V breakdown, 2.2 Ω typical RDS(on), and 2 A peak drain current. |
| 7 | GND | power_in | Ground reference pin for the controller. |
| 8 | GND | power_in | Ground reference pin for the controller, bonded in parallel with pin 7. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen Fuman |
| Package | DIP-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Built-in MOS drain voltage | VDrain | -0.3 | 650 | V | 3 | ||
| VDD input voltage | VDD | -0.3 | 30 | V | 3 | ||
| VDD-G input voltage | VVDD-G | -0.3 | 30 | V | 3 | ||
| VDD clamp continuous current | IDD | 10 | mA | 3 | |||
| FB input voltage | VFB | -0.3 | 7 | V | 3 | ||
| SENSE input voltage | VSENSE | -0.3 | 7 | V | 3 | ||
| Operating junction temperature (min/max) | TJ | -20 | 150 | ℃ | 3 | ||
| Storage temperature (min/max) | TSTG | -55 | 160 | ℃ | 3 | ||
| Soldering temperature | Tr | 260 | ℃ | soldering 10 s | 3 | ||
| Startup current | I_VDD_ST | 5 | 20 | uA | VDD=12.5V | 3 | |
| UVLO turn-on threshold voltage | UVLO_ON | 8.4 | 9.4 | 10.4 | V | 3 | |
| UVLO turn-off threshold voltage | UVLO_OFF | 14.2 | 15.2 | 16.2 | V | 3 | |
| OVP_ON overvoltage protection threshold | OVP_ON | 26.8 | 28.3 | 29.8 | V | VDD=16VC,CS=0V, FB=3V; raise VDD until GATE off | 3 |
| FB open-circuit voltage | VFB_Open | 4.5 | 4.9 | 5.6 | V | 3 | |
| Overload protection FB threshold voltage | VTH_PL | 3.85 | V | 3 | |||
| Current limit threshold | VTH_OC | 0.72 | 0.77 | 0.82 | V | FB=3.3V | 4 |
| Maximum duty cycle | D_max | 70 | 80 | 90 | % | FB=3.3V,CS=0V,VDD=16V | 4 |
| Frequency jitter range | Δf_OSC | -4 | 4 | % | 4 | ||
| Operating current | I_VDD_OP | 1.6 | mA | VDD=16V, VFB=3V | 3 | ||
| VDD clamp voltage | VDD_Clamp | 30.5 | V | IDD=10mA | 3 | ||
| FB short-circuit current | IFB_Short | 1.2 | mA | 3 | |||
| FB threshold voltage at zero duty cycle | VTH_0D | 0.8 | V | VDD=16V | 3 | ||
| Overload protection delay | TD_PL | 50 | ms | 3 | |||
| FB input impedance | ZFB_IN | 4 | KΩ | 3 | |||
| Leading-edge blanking time | T_blanking | 270 | ns | 4 | |||
| CS input impedance | Zsense | 40 | KΩ | 4 | |||
| Overcurrent detection to GATE off delay | TD_OC | 120 | ns | from overcurrent occurrence to GATE drive off | 4 | ||
| Soft-start time | T_ss | 4 | ms | 4 | |||
| Normal oscillation frequency | Fosc | 65 | KHz | VDD=16V | 4 | ||
| Temperature frequency stability | Δf_Temp | 5 | % | VDD=16V | 4 | ||
| VDD voltage frequency stability | Δf_VDD | 5 | % | INV=0V, CB=5V | 4 | ||
| Burst mode frequency | F_Burst | 22 | KHz | VDD=16V | 4 | ||
| MOS drain-source breakdown voltage | Vds | 650 | V | 4 | |||
| Static drain resistance | RDS(on) | 2.2 | Ω | 4 | |||
| Peak drain current | Idp | 2 | A | 4 |
CAD (KiCad official)
- Symbol:
TC7340 - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
tc7340-etched.step/tc7340-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tc7340.step/tc7340.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen Fuman datasheet (7 pp, sha256
7bb5e1076045cfe2, retrieved 2026-10-31, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TC7340
**Shenzhen Fuman** · AC-DC Controllers & Regulators · DIP-8
TC7340 from Shenzhen Fuman, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD-G | power_in | Internal gate-driver supply terminal; the datasheet gives an absolute maximum input voltage of -0.3 V to 30 V and says gate drive strength can be tuned by a resistor between VDD and VDD-G. |
| 2 | VDD | power_in | Main supply pin, normally powered from the transformer auxiliary winding; it is rated -0.3 V to 30 V absolute maximum, clamps at 30.5 V typical at 10 mA, and enters UVLO at 8.4-10.4 V (on) and 14.2-16.2 V (off). |
| 3 | FB | input | Feedback input for the PWM duty-cycle control and overload detection; absolute maximum voltage is -0.3 V to 7 V, with 4.9 V typical open-circuit voltage and an overload threshold of 3.85 V. |
| 4 | SENSE | input | Current-sense input for peak-current limiting and cycle-by-cycle protection; absolute maximum voltage is -0.3 V to 7 V, with an overcurrent threshold of 0.77 V typical (0.72-0.82 V) and 40 kΩ input impedance. |
| 5 | DRAIN | output | Drain of the internal high-voltage power MOSFET; rated 650 V breakdown (absolute maximum drain voltage -0.3 V to 650 V), 2.2 Ω typical RDS(on), and 2 A peak drain current. |
| 6 | DRAIN | output | Drain of the internal high-voltage power MOSFET, bonded in parallel with pin 5; rated 650 V breakdown, 2.2 Ω typical RDS(on), and 2 A peak drain current. |
| 7 | GND | power_in | Ground reference pin for the controller. |
| 8 | GND | power_in | Ground reference pin for the controller, bonded in parallel with pin 7. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen Fuman |
| Package | DIP-8 |
| Category | Power Management ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Built-in MOS drain voltage | VDrain | -0.3 | | 650 | V | | 3 |
| VDD input voltage | VDD | -0.3 | | 30 | V | | 3 |
| VDD-G input voltage | VVDD-G | -0.3 | | 30 | V | | 3 |
| VDD clamp continuous current | IDD | | | 10 | mA | | 3 |
| FB input voltage | VFB | -0.3 | | 7 | V | | 3 |
| SENSE input voltage | VSENSE | -0.3 | | 7 | V | | 3 |
| Operating junction temperature (min/max) | TJ | -20 | | 150 | ℃ | | 3 |
| Storage temperature (min/max) | TSTG | -55 | | 160 | ℃ | | 3 |
| Soldering temperature | Tr | | | 260 | ℃ | soldering 10 s | 3 |
| Startup current | I_VDD_ST | | 5 | 20 | uA | VDD=12.5V | 3 |
| UVLO turn-on threshold voltage | UVLO_ON | 8.4 | 9.4 | 10.4 | V | | 3 |
| UVLO turn-off threshold voltage | UVLO_OFF | 14.2 | 15.2 | 16.2 | V | | 3 |
| OVP_ON overvoltage protection threshold | OVP_ON | 26.8 | 28.3 | 29.8 | V | VDD=16VC,CS=0V, FB=3V; raise VDD until GATE off | 3 |
| FB open-circuit voltage | VFB_Open | 4.5 | 4.9 | 5.6 | V | | 3 |
| Overload protection FB threshold voltage | VTH_PL | | 3.85 | | V | | 3 |
| Current limit threshold | VTH_OC | 0.72 | 0.77 | 0.82 | V | FB=3.3V | 4 |
| Maximum duty cycle | D_max | 70 | 80 | 90 | % | FB=3.3V,CS=0V,VDD=16V | 4 |
| Frequency jitter range | Δf_OSC | -4 | | 4 | % | | 4 |
| Operating current | I_VDD_OP | | 1.6 | | mA | VDD=16V, VFB=3V | 3 |
| VDD clamp voltage | VDD_Clamp | | 30.5 | | V | IDD=10mA | 3 |
| FB short-circuit current | IFB_Short | | 1.2 | | mA | | 3 |
| FB threshold voltage at zero duty cycle | VTH_0D | | 0.8 | | V | VDD=16V | 3 |
| Overload protection delay | TD_PL | | 50 | | ms | | 3 |
| FB input impedance | ZFB_IN | | 4 | | KΩ | | 3 |
| Leading-edge blanking time | T_blanking | | 270 | | ns | | 4 |
| CS input impedance | Zsense | | 40 | | KΩ | | 4 |
| Overcurrent detection to GATE off delay | TD_OC | | 120 | | ns | from overcurrent occurrence to GATE drive off | 4 |
| Soft-start time | T_ss | | 4 | | ms | | 4 |
| Normal oscillation frequency | Fosc | | 65 | | KHz | VDD=16V | 4 |
| Temperature frequency stability | Δf_Temp | | 5 | | % | VDD=16V | 4 |
| VDD voltage frequency stability | Δf_VDD | | 5 | | % | INV=0V, CB=5V | 4 |
| Burst mode frequency | F_Burst | | 22 | | KHz | VDD=16V | 4 |
| MOS drain-source breakdown voltage | Vds | | 650 | | V | | 4 |
| Static drain resistance | RDS(on) | | 2.2 | | Ω | | 4 |
| Peak drain current | Idp | | 2 | | A | | 4 |
## CAD (KiCad official)
- Symbol: `TC7340`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files: `tc7340-etched.step` / `tc7340-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tc7340.step` / `tc7340.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shenzhen Fuman datasheet](docs/tc7340-datasheet.pdf) (7 pp, sha256 `7bb5e1076045cfe2`, retrieved 2026-10-31, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tc7340-datasheet.pdf)