# TC4538BP

**TOSHIBA** · Monostable Multivibrators · DIP-16

TC4538BP from TOSHIBA, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1T1 | passive | Circuit 1 timing node T1 for the external capacitor CX, which sets the output pulse width with RX (RX 5 kΩ to 1000 kΩ). |
| 2 | 1T2 | passive | Circuit 1 timing node T2 where external RX and CX connect, with pulse width twOUT = CX·RX. |
| 3 | 1CD | input | Circuit 1 active-low clear/reset input that forces Q low and Q̅ high when low, and is tied to GND if the circuit is unused. |
| 4 | 1A | input | Circuit 1 trigger input A that triggers on the rising edge when 1B is high. |
| 5 | 1B | input | Circuit 1 trigger input B that triggers on the falling edge when 1A is low. |
| 6 | 1Q | output | Circuit 1 non-inverted monostable pulse output, left open if unused. |
| 7 | 1Q̅ | output | Circuit 1 inverted monostable pulse output, left open if unused. |
| 8 | VSS | power_in | Ground supply pin (VSS = 0 V). |
| 9 | 2Q̅ | output | Circuit 2 inverted monostable pulse output, left open if unused. |
| 10 | 2Q | output | Circuit 2 non-inverted monostable pulse output, left open if unused. |
| 11 | 2B | input | Circuit 2 trigger input B that triggers on the falling edge when 2A is low. |
| 12 | 2A | input | Circuit 2 trigger input A that triggers on the rising edge when 2B is high. |
| 13 | 2CD | input | Circuit 2 active-low clear/reset input that forces Q low and Q̅ high when low, and is tied to GND if the circuit is unused. |
| 14 | 2T2 | passive | Circuit 2 timing node T2 where external RX and CX connect, with pulse width twOUT = CX·RX. |
| 15 | 2T1 | passive | Circuit 2 timing node T1 for the external capacitor CX, which sets the output pulse width with RX (RX 5 kΩ to 1000 kΩ). |
| 16 | VDD | power_in | Positive supply voltage, operating range 3 V to 18 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | DIP-16 |
| Category | Logic ICs |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage | VDD | 3 |  | 18 | V | VSS = 0 V | 3 |
| Input voltage | VIN | 0 |  |  | V | VSS = 0 V; max = VDD | 3 |
| External resistance | RX | 5 |  | 1000 | kΩ |  | 3 |
| DC supply voltage (abs max) | VDD |  |  | 20 | V | VSS − 0.5 to VSS + 20 | 3 |
| Input voltage (abs max) | VIN | -0.5 |  |  | V | VSS − 0.5 to VDD + 0.5 | 3 |
| Output voltage (abs max) | VOUT | -0.5 |  |  | V | VSS − 0.5 to VDD + 0.5 | 3 |
| DC input current | IIN | -10 |  | 10 | mA |  | 3 |
| Power dissipation | PD |  |  | 300 | mW | DIP | 3 |
| Operating temperature range | Topr | -40 |  | 85 | °C |  | 3 |
| Storage temperature range | Tstg | -65 |  | 150 | °C |  | 3 |
| High-level output voltage | VOH | 4.95 | 5 |  | V | /IOUT/<1 µA, VIN=VSS,VDD; VDD=5 V; 25°C | 4 |
| High-level output voltage | VOH | 9.95 | 10 |  | V | /IOUT/<1 µA, VIN=VSS,VDD; VDD=10 V; 25°C | 4 |
| High-level output voltage | VOH | 14.95 | 15 |  | V | /IOUT/<1 µA, VIN=VSS,VDD; VDD=15 V; 25°C | 4 |
| Low-level output voltage | VOL |  | 0 | 0.05 | V | /IOUT/<1 µA, VIN=VSS,VDD; VDD=5/10/15 V; 25°C | 4 |
| Input leakage current high | IIH |  |  | 0.1 | µA | VIH = 18 V, VDD=18 V; -40°C and 25°C | 4 |
| Input leakage current low | IIL | -0.1 |  |  | µA | VIL = 0 V, VDD=18 V; -40°C and 25°C | 4 |
| Quiescent supply current | IDD |  | 0.005 | 5 | µA | VIN=VSS,VDD; VDD=5 V; 25°C | 4 |
| Quiescent supply current | IDD |  | 0.01 | 10 | µA | VIN=VSS,VDD; VDD=10 V; 25°C | 4 |
| Quiescent supply current | IDD |  | 0.015 | 20 | µA | VIN=VSS,VDD; VDD=15 V; 25°C | 4 |
| Output transition time (low to high) | tTLH |  | 50 | 100 | ns | VDD=10 V, Ta=25°C, CL=50 pF | 5 |
| Output transition time (high to low) | tTHL |  | 50 | 100 | ns | VDD=10 V, Ta=25°C, CL=50 pF | 5 |
| Propagation delay (A, B to Q) | tpLH/tpHL |  | 150 | 300 | ns | VDD=10 V, Ta=25°C, CL=50 pF | 5 |
| Propagation delay (CD to Q) | tpLH/tpHL |  | 110 | 250 | ns | VDD=10 V, Ta=25°C, CL=50 pF | 5 |
| Min input pulse width (A, B) | tWH/tWL |  | 30 | 60 | ns | VDD=10 V, Ta=25°C, CL=50 pF | 5 |
| Min pulse width (CD) | tWL |  | 45 | 90 | ns | VDD=10 V, Ta=25°C, CL=50 pF | 5 |
| Output pulse width | twOUT | 9.5 | 10 | 10.5 | ms | RX=100 kΩ, CX=0.1 µF, VDD=10 V, Ta=25°C | 5 |
| Output pulse width | twOUT | 9.3 | 9.95 | 10.4 | ms | RX=100 kΩ, CX=0.1 µF, VDD=5 V, Ta=25°C | 5 |
| Output pulse width | twOUT | 9.55 | 10.05 | 10.65 | ms | RX=100 kΩ, CX=0.1 µF, VDD=15 V, Ta=25°C | 5 |
| Input capacitance | CIN |  | 5 | 7.5 | pF |  | 5 |
| Pulse width match between circuits | ΔtwOUT |  | 1 |  | % | VDD=5/10/15 V, typ ±1 | 5 |

## CAD (KiCad official)

- Symbol: `TC4538BP`
- Footprint: `Package_DIP:DIP-16_W7.62mm`
- 3D model: DIP-16 (KiCad packages3D, STEP)
- 3D model files: `tc4538bp-etched.step` / `tc4538bp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tc4538bp.step` / `tc4538bp.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TOSHIBA datasheet](docs/tc4538bp-datasheet.pdf) (9 pp, sha256 `007470710fa1f1c2`, retrieved 2026-10-24, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tc4538bp-datasheet.pdf)