# TC4427COA

**Microchip Tech** · Gate Drivers · SOIC-8

TC4427COA from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection; the datasheet lists this pin as not connected internally. |
| 2 | IN A | input | MOSFET driver input A is a high-impedance TTL/CMOS compatible input with 300 mV of hysteresis, and any unused driver input must be grounded. |
| 3 | GND | power_in | Device return pin that should have a low-impedance connection to the bias supply return, since high peak current flows out of it when the capacitive load is discharged. |
| 4 | IN B | input | MOSFET driver input B is a high-impedance TTL/CMOS compatible input with 300 mV of hysteresis, and any unused driver input must be grounded. |
| 5 | OUT B | output | MOSFET driver output B is a low-impedance CMOS push-pull output with pull-up and pull-down devices of equal strength. |
| 6 | VDD | power_in | Bias supply input rated for 4.5V to 18V with respect to GND, which should be bypassed with local ceramic capacitors (1.0 µF suggested). |
| 7 | OUT A | output | MOSFET driver output A is a low-impedance CMOS push-pull output with pull-up and pull-down devices of equal strength. |
| 8 | NC | unconnected | No connection; the datasheet lists this pin as not connected internally. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic '1', High Input Voltage | VIH | 2.4 |  |  | V | Note 2 | 3 |
| Logic '0', Low Input Voltage | VIL |  |  | 0.8 | V |  | 3 |
| Input Current | IIN | -1 |  | 1 | µA | 0V ≤ VIN ≤ VDD | 3 |
| Low Output Voltage | VOL |  |  | 0.025 | V | DC Test | 3 |
| Output Resistance | RO |  | 7 | 10 | Ω | IOUT = 10 mA, VDD = 18V | 3 |
| Rise Time | tR |  | 19 | 30 | ns | Figure 4-1 | 3 |
| Fall Time | tF |  | 19 | 30 | ns | Figure 4-1 | 3 |
| Delay Time tD1 | tD1 |  | 20 | 30 | ns | Figure 4-1 | 3 |
| Delay Time tD2 | tD2 |  | 40 | 50 | ns | Figure 4-1 | 3 |
| Power Supply Current (logic 0 input) | IS |  |  | 4.5 | mA | VIN = 3V (Both inputs) | 3 |
| Power Supply Current (logic 1 input) | IS |  |  | 0.4 | mA | VIN = 0V (Both inputs) | 3 |
| Logic '1', High Input Voltage (over operating temperature range) | VIH | 2.4 |  |  | V | Note 2 | 4 |
| Logic '0', Low Input Voltage (over operating temperature range) | VIL |  |  | 0.8 | V |  | 4 |
| Input Current (over operating temperature range) | IIN | -10 |  | 10 | µA | 0V ≤ VIN ≤ VDD | 4 |
| Output Resistance (over operating temperature range) | RO |  | 9 | 12 | Ω | IOUT = 10 mA, VDD = 18V | 4 |
| Rise Time (over operating temperature range) | tR |  |  | 40 | ns | Figure 4-1 | 4 |
| Fall Time (over operating temperature range) | tF |  |  | 40 | ns | Figure 4-1 | 4 |
| Delay Time tD1 (over operating temperature range) | tD1 |  |  | 40 | ns | Figure 4-1 | 4 |
| Delay Time tD2 (over operating temperature range) | tD2 |  |  | 60 | ns | Figure 4-1 | 4 |
| Power Supply Current (logic 0 input, over operating temperature range) | IS |  |  | 8 | mA | VIN = 3V (Both inputs) | 4 |
| Power Supply Current (logic 1 input, over operating temperature range) | IS |  |  | 0.6 | mA | VIN = 0V (Both inputs) | 4 |
| Supply Voltage |  |  |  | 22 | V |  | 3 |
| Storage Temperature Range | TA | -65 |  | 150 | °C |  | 4 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 4 |
| Specified Temperature Range (C) | TA | 0 |  | 70 | °C |  | 4 |
| Supply Input Voltage (VDD) | VDD | 4.5 |  | 18 | V |  | 9 |
| Thermal Resistance, 8L-SOIC (junction to ambient) | JA |  | 155 |  | °C/W |  | 4 |
| Peak Output Current | IPK |  | 1.5 |  | A | VDD = 18V | 3 |
| Peak Output Current (over operating temperature range) | IPK |  | 1.5 |  | A | VDD = 18V | 4 |

## CAD (KiCad official)

- Symbol: `TC4427COA`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tc4427coa-etched.step` / `tc4427coa-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tc4427coa.step` / `tc4427coa.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589041807186907136) (28 pp, sha256 `92aa2e8a1bda9e95`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tc4427coa-datasheet.pdf)