component
TC4422AVOA
Public Made by Adomby adom
Microchip Tech Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTC4422AVOA
Microchip Tech · Gate Drive ICs · SOIC-8
TC4422AVOA from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply voltage, 4.5V to 18V, with a ceramic bypass capacitor (1.0 µF minimum recommended) close to VDD and GND; must be connected together with pin 8. |
| 2 | INPUT | input | Control input, high-impedance TTL/CMOS compatible with 300 mV hysteresis between the high and low thresholds. |
| 3 | NC | unconnected | No connection. |
| 4 | GND | power_in | Ground, return path for bias current and high peak capacitive-load discharge current; must be connected together with pin 5. |
| 5 | GND | power_in | Ground, return path for bias current and high peak capacitive-load discharge current; must be connected together with pin 4. |
| 6 | OUTPUT | output | CMOS push-pull output with 10A typical peak current drive and withstanding 1.5A reverse current of either polarity; must be connected together with pin 7. |
| 7 | OUTPUT | output | CMOS push-pull output with 10A typical peak current drive and withstanding 1.5A reverse current of either polarity; must be connected together with pin 6. |
| 8 | VDD | power_in | Supply voltage, 4.5V to 18V; must be connected together with pin 1. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input current | IIN | -10 | 10 | µA | 0V ≤ VIN ≤ VDD | 3 | |
| Logic 1 high input voltage | VIH | 2.4 | 1.8 | V | 3 | ||
| Logic 0 low input voltage | VIL | 1.3 | 0.8 | V | 3 | ||
| Input voltage | VIN | -5 | V | max printed as VDD, 0.3 | 3 | ||
| Low output voltage | VOL | 0.025 | V | DC test | 3 | ||
| High output resistance | ROH | 1.25 | 1.5 | Ω | IOUT = 10 mA, VDD = 18V | 3 | |
| Low output resistance | ROL | 0.8 | 1.1 | Ω | IOUT = 10 mA, VDD = 18V | 3 | |
| Peak output current | IPK | 10 | A | VDD = 18V | 3 | ||
| Continuous output current | IDC | 2 | A | 10V ≤ VDD ≤ 18V, TA = +25°C | 3 | ||
| Rise time | tR | 28 | 34 | ns | Figure 4-1, CL = 10,000 pF | 3 | |
| Fall time | tF | 26 | 32 | ns | Figure 4-1, CL = 10,000 pF | 3 | |
| Propagation delay | tD1 | 38 | 45 | ns | Figure 4-1, CL = 10,000 pF | 3 | |
| Propagation delay | tD2 | 42 | 49 | ns | Figure 4-1, CL = 10,000 pF | 3 | |
| Power supply current | IS | 130 | 250 | µA | VIN = 3V | 3 | |
| Power supply current | IS | 35 | 100 | µA | VIN = 0V | 3 | |
| Input operating voltage | VDD | 4.5 | 18 | V | 3 | ||
| Input current (full temp range) | IIN | -10 | 10 | µA | 0V ≤ VIN ≤ VDD | 4 | |
| Logic 1 high input voltage (full temp range) | VIH | 2.4 | V | 4 | |||
| Logic 0 low input voltage (full temp range) | VIL | 0.8 | V | 4 | |||
| Low output voltage (full temp range) | VOL | 0.025 | V | DC test | 4 | ||
| High output resistance (full temp range) | ROH | 2 | Ω | IOUT = 10 mA, VDD = 18V | 4 | ||
| Low output resistance (full temp range) | ROL | 1.6 | Ω | IOUT = 10 mA, VDD = 18V | 4 | ||
| Rise time (full temp range) | tR | 38 | 45 | ns | Figure 4-1, CL = 10,000 pF | 4 | |
| Fall time (full temp range) | tF | 33 | 40 | ns | Figure 4-1, CL = 10,000 pF | 4 | |
| Propagation delay (full temp range) | tD1 | 50.4 | 60 | ns | Figure 4-1, CL = 10,000 pF | 4 | |
| Propagation delay (full temp range) | tD2 | 53 | 60 | ns | Figure 4-1, CL = 10,000 pF | 4 | |
| Power supply current (full temp range) | IS | 200 | 500 | µA | VIN = 3V | 4 | |
| Power supply current (full temp range) | IS | 50 | 150 | µA | VIN = 0V | 4 | |
| Input operating voltage (full temp range) | VDD | 4.5 | 18 | V | 4 | ||
| Specified temperature range (V) | TA | -40 | 125 | °C | 4 | ||
| Maximum junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature range | TA | -65 | 150 | °C | 4 | ||
| Supply voltage | 20 | V | 3 | ||||
| Input current | 50 | mA | VIN > VDD | 3 | |||
| Thermal resistance, 8-pin SOIC | θJA | 155 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
TC4422AVOA - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tc4422avoa-etched.step/tc4422avoa-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tc4422avoa.step/tc4422avoa.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (22 pp, sha256
416a1c3078f0a5e1, retrieved 2026-10-24, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).