component
TC4421CPA
Public Made by Adomby adom
Microchip Tech Gate Drive ICs, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 7d ago |
| viewers | 7d ago |
| package.json | 7d ago |
| page.json | 7d ago |
| README.md | 7d ago |
| tc4421cpa-etched.glb | 7d ago |
| tc4421cpa-etched.step | 7d ago |
| tc4421cpa-hero.glb | 7d ago |
| tc4421cpa-hero.overlay.json | 7d ago |
| tc4421cpa.glb | 7d ago |
| tc4421cpa.kicad_mod | 7d ago |
| tc4421cpa.kicad_sym | 7d ago |
| tc4421cpa.lbr | 7d ago |
| tc4421cpa.step | 7d ago |
| verification.json | 7d ago |
TC4421CPA
Microchip Tech · Gate Drive ICs · PDIP-8
TC4421CPA from Microchip Tech, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply input rated 4.5V to 18V with respect to GND; duplicate VDD pins must both be connected and bypassed with a local ceramic capacitor of at least 1.0 µF suggested. |
| 2 | INPUT | input | High-impedance TTL/CMOS compatible control input with 300 mV of hysteresis between the high and low thresholds. |
| 3 | NC | unconnected | No connection. |
| 4 | GND | power_in | Ground return for bias current and high peak discharge currents; both GND pins must be connected and tied to a ground plane or very short traces. |
| 5 | GND | power_in | Ground return for bias current and high peak discharge currents; both GND pins must be connected and tied to a ground plane or very short traces. |
| 6 | OUTPUT | output | CMOS push-pull output driving capacitive loads with 9.0A peak current and withstanding 1.5A peak reverse current of either polarity; duplicate output pins must both be connected. |
| 7 | OUTPUT | output | CMOS push-pull output driving capacitive loads with 9.0A peak current and withstanding 1.5A peak reverse current of either polarity; duplicate output pins must both be connected. |
| 8 | VDD | power_in | Supply input rated 4.5V to 18V with respect to GND; duplicate VDD pins must both be connected and bypassed with a local ceramic capacitor of at least 1.0 µF suggested. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | PDIP-8 |
| Category | Power Management ICs |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TC4421CPA - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files:
tc4421cpa-etched.step/tc4421cpa-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tc4421cpa.step/tc4421cpa.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (24 pp, sha256
fdfdd968dd4e8796, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).