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docs tc4059: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
page.json tc4059: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md tc4059: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
tc4059-etched.fit.json tc4059: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tc4059-etched.glb tc4059: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tc4059-etched.step tc4059: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tc4059.glb fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body… · Ray
tc4059.kicad_mod Publish 0.1.0 · Ray
tc4059.kicad_sym add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
tc4059.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tc4059.step fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body… · Ray

TC4059

Shenzhen Fuman · Battery Management · ESOP-8

TC4059 from Shenzhen Fuman, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TEMP input Battery temperature sense input. Connect to the divider between VCC, an NTC thermistor and GND. Charging is suspended when V(TEMP) < 30% VCC (hot) or > 60% VCC (cold). Tie to GND to disable the NTC feature; other charging functions remain normal.
2 PROG passive External charge-current programming pin. A resistor from PROG to GND sets fast-charge current per I_BAT = V_PROG / R_PROG × 1700 (V_PROG = 1V in CC mode, 0.1V in trickle mode). Also used to monitor instantaneous charge current. 1% precision resistor recommended.
3 GND power_in Device ground / power return.
4 VCC power_in Input supply. Normal operating range 4.5-6V (typical 5V); OVP trips at ~7V (6.7-7.3V) and absolute max is 36V (slow ramp), enabling survival of hot-plug transients. UVLO ~3.5V rising with 100mV hysteresis.
5 BAT power_out Battery connection / charge current output. Regulates to 4.2V float and sources the programmed charge current up to 1A. High-voltage tolerant to 30V; sleep-mode leakage ≤ 30nA. Bypass with 1-10µF to GND close to the pin.
6 STDBY output Open-drain charge-complete indicator. Internally pulled low (up to 5mA) when charging has terminated (charge current has fallen below I_TERM); high-impedance otherwise. Absolute max 7V.
7 CHRG output Open-drain charging status indicator. Pulled low (up to 5mA) while a charge cycle is in progress; high-impedance otherwise. Typically drives an LED to indicate charging activity. Absolute max 7V.
8 EN input Chip enable input, TTL/CMOS compatible. Logic high (V > 1V typ) enables normal operation; logic low (V < 0.9V typ) puts the device into shutdown (~22µA). Absolute max 7V; leakage ±1µA.

Key specifications

Parameter Value
Manufacturer Shenzhen Fuman
Package ESOP-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • TC4059E
  • TC4059D3
  • TC4059D2
  • TC4059S

CAD (KiCad official)

  • Symbol: TC4059
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: tc4059-etched.step / tc4059-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tc4059.step / tc4059.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tc4059.step 193 KB You want the bare part, or you mark your own boards.
tc4059-etched.step 1.2 MB You want the part with TC4059 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 309 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shenzhen Fuman datasheet (10 pp, sha256 ee4d4d1e5d946092, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF