component
TC4052BF
Public Made by Adomby adom
TOSHIBA Analog Switches, Multiplexers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTC4052BF
TOSHIBA · Analog Switches, Multiplexers · SOP-16
TC4052BF from TOSHIBA, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 0Y | bidirectional | Y-side analog channel 0 input/output, connected to Y-COM when A=B=L and INH=L. |
| 2 | 2Y | bidirectional | Y-side analog channel 2 input/output, connected to Y-COM when A=L, B=H and INH=L. |
| 3 | Y-COM | bidirectional | Y-side common analog input/output of the differential 4-channel multiplexer/demultiplexer. |
| 4 | 3Y | bidirectional | Y-side analog channel 3 input/output, connected to Y-COM when A=B=H and INH=L. |
| 5 | 1Y | bidirectional | Y-side analog channel 1 input/output, connected to Y-COM when A=H, B=L and INH=L. |
| 6 | INH | input | Inhibit control input; high turns all channels off, and unused control inputs must be tied to VDD or VSS. |
| 7 | VEE | power_in | Negative supply for the analog switch signal range; switch I/O voltage must stay between VEE and VDD, with VDD-VEE of 3 to 18 V. |
| 8 | VSS | power_in | Ground/logic low reference for the control inputs; VDD-VSS must be 3 to 18 V. |
| 9 | B | input | Channel select control input B, with input voltage range VSS to VDD. |
| 10 | A | input | Channel select control input A, with input voltage range VSS to VDD. |
| 11 | 3X | bidirectional | X-side analog channel 3 input/output, connected to X-COM when A=B=H and INH=L. |
| 12 | 0X | bidirectional | X-side analog channel 0 input/output, connected to X-COM when A=B=L and INH=L. |
| 13 | X-COM | bidirectional | X-side common analog input/output of the differential 4-channel multiplexer/demultiplexer. |
| 14 | 1X | bidirectional | X-side analog channel 1 input/output, connected to X-COM when A=H, B=L and INH=L. |
| 15 | 2X | bidirectional | X-side analog channel 2 input/output, connected to X-COM when A=L, B=H and INH=L. |
| 16 | VDD | power_in | Positive supply voltage; VDD-VSS and VDD-VEE must be 3 to 18 V (absolute maximum 20 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | SOP-16 |
| Category | Interface |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage (VDD-VSS) | VDD-VSS | 3 | 18 | V | 5 | ||
| DC supply voltage (VDD-VEE) | VDD-VEE | 3 | 18 | V | 5 | ||
| DC supply voltage (VDD-VSS) | VDD-VSS | -0.5 | 20 | V | 4 | ||
| DC supply voltage (VDD-VEE) | VDD-VEE | -0.5 | 20 | V | 4 | ||
| Control input current | ICIN | -10 | 10 | mA | 4 | ||
| Potential difference across I/O during ON | VI-VO | -0.5 | 0.5 | V | 4 | ||
| Power dissipation | PD | 180 | mW | SOP/TSSOP package | 4 | ||
| Operating temperature range | Topr | -40 | 85 | °C | 4 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Control input low voltage | VIL | 1.5 | V | Ta=-40°C; VDD=5V; VIS=VDD thru 1kΩ; VEE=VSS; RL=1kΩ to VSS; IIS<2µA on all OFF channels | 5 | ||
| Control input low voltage | VIL | 3 | V | Ta=-40°C; VDD=10V; VIS=VDD thru 1kΩ; VEE=VSS; RL=1kΩ to VSS; IIS<2µA on all OFF channels | 5 | ||
| Control input low voltage | VIL | 4 | V | Ta=-40°C; VDD=15V; VIS=VDD thru 1kΩ; VEE=VSS; RL=1kΩ to VSS; IIS<2µA on all OFF channels | 5 | ||
| Control input high voltage | VIH | 3.5 | V | Ta=-40°C; VDD=5V; VIS=VDD thru 1kΩ; VEE=VSS; RL=1kΩ to VSS; IIS<2µA on all OFF channels | 5 | ||
| Control input high voltage | VIH | 7 | V | Ta=-40°C; VDD=10V; VIS=VDD thru 1kΩ; VEE=VSS; RL=1kΩ to VSS; IIS<2µA on all OFF channels | 5 | ||
| Control input high voltage | VIH | 11 | V | Ta=-40°C; VDD=15V; VIS=VDD thru 1kΩ; VEE=VSS; RL=1kΩ to VSS; IIS<2µA on all OFF channels | 5 | ||
| On-state resistance | RON | 850 | Ω | Ta=-40°C; VDD=5V; 0≤VIS≤VDD; RL=10kΩ | 5 | ||
| On-state resistance | RON | 210 | Ω | Ta=-40°C; VDD=10V; 0≤VIS≤VDD; RL=10kΩ | 5 | ||
| On-state resistance | RON | 140 | Ω | Ta=-40°C; VDD=15V; 0≤VIS≤VDD; RL=10kΩ | 5 | ||
| On-state resistance | RON | 240 | 950 | Ω | Ta=25°C; VDD=5V; 0≤VIS≤VDD; RL=10kΩ | 5 | |
| On-state resistance | RON | 110 | 250 | Ω | Ta=25°C; VDD=10V; 0≤VIS≤VDD; RL=10kΩ | 5 | |
| On-state resistance | RON | 80 | 160 | Ω | Ta=25°C; VDD=15V; 0≤VIS≤VDD; RL=10kΩ | 5 | |
| On-state resistance | RON | 1200 | Ω | Ta=85°C; VDD=5V; 0≤VIS≤VDD; RL=10kΩ | 5 | ||
| On-state resistance | RON | 300 | Ω | Ta=85°C; VDD=10V; 0≤VIS≤VDD; RL=10kΩ | 5 | ||
| On-state resistance | RON | 200 | Ω | Ta=85°C; VDD=15V; 0≤VIS≤VDD; RL=10kΩ | 5 | ||
| Input/output leakage current | IOFF | -100 | 100 | nA | Ta=-40°C; VDD=18V; VIN=18V, VOUT=0V or VIN=0V, VOUT=18V | 5 | |
| Input/output leakage current | IOFF | -1000 | 1000 | nA | Ta=85°C; VDD=18V; VIN=18V, VOUT=0V or VIN=0V, VOUT=18V | 5 | |
| Quiescent supply current | IDD | 5 | μA | Ta=-40°C; VDD=5V; VIN=VSS, VDD (all valid input combinations) | 5 | ||
| Quiescent supply current | IDD | 10 | μA | Ta=-40°C; VDD=10V; VIN=VSS, VDD (all valid input combinations) | 5 | ||
| Quiescent supply current | IDD | 20 | μA | Ta=-40°C; VDD=15V; VIN=VSS, VDD (all valid input combinations) | 5 | ||
| Quiescent supply current | IDD | 0.005 | 5 | μA | Ta=25°C; VDD=5V; VIN=VSS, VDD (all valid input combinations) | 5 | |
| Quiescent supply current | IDD | 0.01 | 10 | μA | Ta=25°C; VDD=10V; VIN=VSS, VDD (all valid input combinations) | 5 | |
| Quiescent supply current | IDD | 0.015 | 20 | μA | Ta=25°C; VDD=15V; VIN=VSS, VDD (all valid input combinations) | 5 | |
| Quiescent supply current | IDD | 150 | μA | Ta=85°C; VDD=5V; VIN=VSS, VDD (all valid input combinations) | 5 | ||
| Quiescent supply current | IDD | 300 | μA | Ta=85°C; VDD=10V; VIN=VSS, VDD (all valid input combinations) | 5 | ||
| Quiescent supply current | IDD | 600 | μA | Ta=85°C; VDD=15V; VIN=VSS, VDD (all valid input combinations) | 5 | ||
| Input current | IIN | -0.1 | 0.1 | μA | Ta=-40°C; VDD=18V; VIH=18V / VIL=0V | 5 | |
| Input current | IIN | -1 | 1 | μA | Ta=85°C; VDD=18V; VIH=18V / VIL=0V | 5 | |
| Input capacitance | CIN | 5 | 7.5 | pF | Ta=25°C | 5 | |
| Phase difference between input to output | φI-O | 15 | 45 | ns | Ta=25°C; CL=50pF; VSS=0V, VEE=0V, VDD=5V | 6 | |
| Phase difference between input to output | φI-O | 8 | 20 | ns | Ta=25°C; CL=50pF; VSS=0V, VEE=0V, VDD=10V | 6 | |
| Phase difference between input to output | φI-O | 6 | 15 | ns | Ta=25°C; CL=50pF; VSS=0V, VEE=0V, VDD=15V | 6 |
CAD (KiCad official)
- Symbol:
TC4052BF - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
tc4052bf-etched.step/tc4052bf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tc4052bf.step/tc4052bf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (10 pp, sha256
54497ba24bb4deb4, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).