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TC4001BFT

Public Made by Adom

by adom

TOSHIBA Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TC4001BFT

TOSHIBA · Logic Gates · TSSOP-14

TC4001BFT from TOSHIBA, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 input Gate 1 input A; input voltage range VSS − 0.5 V to VDD + 0.5 V, unused inputs must be tied to VDD or VSS.
2 B1 input Gate 1 input B; input voltage range VSS − 0.5 V to VDD + 0.5 V, unused inputs must be tied to VDD or VSS.
3 X1 output Gate 1 buffered NOR output (X = A + B inverted); output voltage range VSS − 0.5 V to VDD + 0.5 V.
4 X2 output Gate 2 buffered NOR output; output voltage range VSS − 0.5 V to VDD + 0.5 V.
5 A2 input Gate 2 input A; input voltage range VSS − 0.5 V to VDD + 0.5 V, unused inputs must be tied to VDD or VSS.
6 B2 input Gate 2 input B; input voltage range VSS − 0.5 V to VDD + 0.5 V, unused inputs must be tied to VDD or VSS.
7 VSS power_in Ground / negative supply (0 V reference).
8 A3 input Gate 3 input A; input voltage range VSS − 0.5 V to VDD + 0.5 V, unused inputs must be tied to VDD or VSS.
9 B3 input Gate 3 input B; input voltage range VSS − 0.5 V to VDD + 0.5 V, unused inputs must be tied to VDD or VSS.
10 X3 output Gate 3 buffered NOR output; output voltage range VSS − 0.5 V to VDD + 0.5 V.
11 X4 output Gate 4 buffered NOR output; output voltage range VSS − 0.5 V to VDD + 0.5 V.
12 A4 input Gate 4 input A; input voltage range VSS − 0.5 V to VDD + 0.5 V, unused inputs must be tied to VDD or VSS.
13 B4 input Gate 4 input B; input voltage range VSS − 0.5 V to VDD + 0.5 V, unused inputs must be tied to VDD or VSS.
14 VDD power_in Positive supply; operating range 3 V to 18 V (absolute maximum VSS + 20 V).

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC supply voltage VDD -0.5 20 V VSS - 0.5 to VSS + 20 2
Input voltage VIN -0.5 0.5 V VSS - 0.5 to VDD + 0.5 2
Output voltage VOUT -0.5 0.5 V VSS - 0.5 to VDD + 0.5 2
DC input current IIN -10 10 mA ±10 2
Power dissipation PD 180 mW SOP/TSSOP 2
Operating temperature range Topr -40 85 °C 2
Storage temperature range Tstg -65 150 °C 2
DC supply voltage VDD 3 18 V VSS = 0 V 2
Input voltage VIN 0 V VSS = 0 V; max VDD 2
High-level output voltage VOH 4.95 5 V /IOUT/<1 μA, VIN=VSS, VDD=5 V, 25°C 3
High-level output voltage VOH 9.95 10 V /IOUT/<1 μA, VIN=VSS, VDD=10 V, 25°C 3
High-level output voltage VOH 14.95 15 V /IOUT/<1 μA, VIN=VSS, VDD=15 V, 25°C 3
Low-level output voltage VOL 0 0.05 V /IOUT/<1 μA, VIN=VSS, VDD, VDD=5 V, 25°C 3
Output high current IOH -0.51 -1 mA VOH=4.6 V, VDD=5 V, VIN=VSS, 25°C 3
Output high current IOH -2.1 -4 mA VOH=2.5 V, VDD=5 V, VIN=VSS, 25°C 3
Output high current IOH -1.3 -2.2 mA VOH=9.5 V, VDD=10 V, VIN=VSS, 25°C 3
Output high current IOH -3.4 -9 mA VOH=13.5 V, VDD=15 V, VIN=VSS, 25°C 3
Output low current IOL 0.51 1.2 mA VOL=0.4 V, VDD=5 V, VIN=VSS, VDD, 25°C 3
Output low current IOL 1.3 3.2 mA VOL=0.5 V, VDD=10 V, VIN=VSS, VDD, 25°C 3
Output low current IOL 3.4 12 mA VOL=1.5 V, VDD=15 V, VIN=VSS, VDD, 25°C 3
Input high voltage VIH 3.5 2.75 V VOUT=0.5 V, /IOUT/<1 μA, VDD=5 V, 25°C 3
Input high voltage VIH 7 5.5 V VOUT=1.0 V, /IOUT/<1 μA, VDD=10 V, 25°C 3
Input high voltage VIH 11 8.25 V VOUT=1.5 V, /IOUT/<1 μA, VDD=15 V, 25°C 3
Input low voltage VIL 2.25 1.5 V VOUT=0.5 V, 4.5 V, /IOUT/<1 μA, VDD=5 V, 25°C 3
Input low voltage VIL 4.5 3 V VOUT=1.0 V, 9.0 V, /IOUT/<1 μA, VDD=10 V, 25°C 3
Input low voltage VIL 6.75 4 V VOUT=1.5 V, 13.5 V, /IOUT/<1 μA, VDD=15 V, 25°C 3
Quiescent supply current IDD 0.001 0.25 μA VIN=VSS, VDD, VDD=5 V, 25°C 3
Quiescent supply current IDD 0.001 0.5 μA VIN=VSS, VDD, VDD=10 V, 25°C 3
Quiescent supply current IDD 0.002 1 μA VIN=VSS, VDD, VDD=15 V, 25°C 3
Output transition time (low to high) tTLH 70 200 ns VDD=5 V, Ta=25°C, CL=50 pF 4
Output transition time (low to high) tTLH 35 100 ns VDD=10 V, Ta=25°C, CL=50 pF 4
Output transition time (low to high) tTLH 30 80 ns VDD=15 V, Ta=25°C, CL=50 pF 4
Output transition time (high to low) tTHL 70 200 ns VDD=5 V, Ta=25°C, CL=50 pF 4
Output transition time (high to low) tTHL 35 100 ns VDD=10 V, Ta=25°C, CL=50 pF 4
Output transition time (high to low) tTHL 30 80 ns VDD=15 V, Ta=25°C, CL=50 pF 4
Propagation delay time (low to high) tpLH 65 200 ns VDD=5 V, Ta=25°C, CL=50 pF 4
Propagation delay time (low to high) tpLH 30 100 ns VDD=10 V, Ta=25°C, CL=50 pF 4
Propagation delay time (low to high) tpLH 25 80 ns VDD=15 V, Ta=25°C, CL=50 pF 4
Propagation delay time (high to low) tpHL 65 200 ns VDD=5 V, Ta=25°C, CL=50 pF 4
Propagation delay time (high to low) tpHL 30 100 ns VDD=10 V, Ta=25°C, CL=50 pF 4
Propagation delay time (high to low) tpHL 25 80 ns VDD=15 V, Ta=25°C, CL=50 pF 4
Input capacitance CIN 5 7.5 pF 4

CAD (KiCad official)

  • Symbol: TC4001BFT
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: tc4001bft-etched.step / tc4001bft-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tc4001bft.step / tc4001bft.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (8 pp, sha256 26f42109dd65685e, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF