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TC2320TG-G

Microchip Tech · MOSFETs · SOIC-8

TC2320TG-G from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SN passive Source of the N-channel MOSFET; the datasheet gives no separate pin-level limit, so the device Absolute Maximum Ratings apply (Gate-to-Source ±20 V, storage and operating ambient −55°C to +150°C).
2 GN input Gate of the N-channel MOSFET; gate-to-source voltage is limited to ±20 V per the Absolute Maximum Ratings.
3 SP passive Source of the P-channel MOSFET; the datasheet gives no separate pin-level limit, so the device Absolute Maximum Ratings apply (Gate-to-Source ±20 V, storage and operating ambient −55°C to +150°C).
4 GP input Gate of the P-channel MOSFET; gate-to-source voltage is limited to ±20 V per the Absolute Maximum Ratings.
5 DP passive Drain of the P-channel MOSFET; P-channel drain-to-source breakdown voltage is −200 V minimum (BVDSS, VGS = 0 V, ID = −2 mA).
6 DP passive Drain of the P-channel MOSFET (second pin, internally the same drain as pin 5); P-channel drain-to-source breakdown voltage is −200 V minimum (BVDSS, VGS = 0 V, ID = −2 mA).
7 DN passive Drain of the N-channel MOSFET; N-channel drain-to-source breakdown voltage is 200 V minimum (BVDSS, VGS = 0 V, ID = 100 µA).
8 DN passive Drain of the N-channel MOSFET (second pin, internally the same drain as pin 7); N-channel drain-to-source breakdown voltage is 200 V minimum (BVDSS, VGS = 0 V, ID = 100 µA).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
N-ch Drain-to-Source Breakdown Voltage BVDSS 200 V VGS = 0V, ID = 100 µA 2
N-ch Gate Threshold Voltage VGS(th) 0.6 2 V VGS = VDS, ID = 1 mA 2
N-ch Change in VGS(th) with Temperature ΔVGS(th) -4.5 mV/°C VGS = VDS, ID = 1 mA (Note 2) 2
N-ch Gate Body Leakage Current IGSS 100 nA VGS = ±20V, VDS = 0V 2
N-ch Zero-Gate Voltage Drain Current (VDS = 100V) IDSS 1 µA VGS = 0V, VDS = 100V 2
N-ch Zero-Gate Voltage Drain Current (VDS = maximum rating) IDSS 10 µA VGS = 0V, VDS = Maximum rating 2
N-ch Zero-Gate Voltage Drain Current (TA = 125°C) IDSS 1 mA VGS = 0V, TA = 125°C, VDS = 0.8 Maximum rating (Note 2) 2
N-ch On-State Drain Current (VGS = 4.5V) ID(ON) 0.6 A VGS = 4.5V, VDS = 25V 2
N-ch On-State Drain Current (VGS = 10V) ID(ON) 1.2 A VGS = 10V, VDS = 25V 2
N-ch Static Drain-to-Source On-State Resistance (VGS = 4.5V) RDS(ON) 8 Ω VGS = 4.5V, ID = 150 mA 2
N-ch Static Drain-to-Source On-State Resistance (VGS = 10V) RDS(ON) 7 Ω VGS = 10V, ID = 1A 2
N-ch Change in RDS(ON) with Temperature ΔRDS(ON) 1 %/°C VGS = 4.5V, ID = 150 mA (Note 2) 2
N-ch Forward Transconductance GFS 150 mmho VDS = 25V, ID = 200 mA 2
N-ch Input Capacitance CISS 110 pF VGS = 0V, VDS = 25V, f = 1 MHz 2
N-ch Common Source Output Capacitance COSS 60 pF 2
N-ch Reverse Transfer Capacitance CRSS 23 pF 2
N-ch Turn-On Delay Time td(ON) 20 ns VDD = 25V, ID = 150 mA, RGEN = 25Ω 2
N-ch Rise Time tr 15 ns 2
N-ch Turn-Off Delay Time td(OFF) 25 ns 2
N-ch Fall Time tf 25 ns 2
N-ch Diode Forward Voltage Drop VSD 1.8 V VGS = 0V, ISD = 200 mA (Note 1) 2
P-ch Drain-to-Source Breakdown Voltage BVDSS -200 V VGS = 0V, ID = -2 mA 3
P-ch Gate Threshold Voltage VGS(th) -1 -2.4 V VGS = VDS, ID = -1 mA 3
P-ch Change in VGS(th) with Temperature ΔVGS(th) 4.5 mV/°C VGS = VDS, ID = -1 mA (Note 2) 3
P-ch Gate Body Leakage IGSS -100 nA VGS = ±20V, VDS = 0V 3
P-ch Zero-Gate Voltage Drain Current (VDS = maximum rating) IDSS -10 µA VGS = 0V, VDS = Maximum rating 3
P-ch Zero-Gate Voltage Drain Current (TA = 125°C) IDSS -1 mA VGS = 0V, TA = 125°C, VDS = 0.8 Maximum rating (Note 2) 3
P-ch On-State Drain Current (VGS = -4.5V) ID(ON) -0.25 -0.7 A VGS = -4.5V, VDS = -25V 3
P-ch On-State Drain Current (VGS = -10V) ID(ON) -0.75 -2.1 A VGS = -10V, VDS = -25V 3
P-ch Static Drain-to-Source On-State Resistance (VGS = -4.5V) RDS(ON) 10 15 Ω VGS = -4.5V, ID = -100 mA 3
P-ch Static Drain-to-Source On-State Resistance (VGS = -10V) RDS(ON) 8 12 Ω VGS = -10V, ID = -200 mA 3
P-ch Change in RDS(ON) with Temperature ΔRDS(ON) 1.7 %/°C VGS = -10V, ID = -200 mA (Note 2) 3
P-ch Forward Transconductance GFS 100 250 mmho VDS = -25V, ID = -200 mA 3
P-ch Input Capacitance CISS 75 125 pF VGS = 0V, VDS = -25V, f = 1 MHz 3
P-ch Common-Source Output Capacitance COSS 20 85 pF 3
P-ch Reverse Transfer Capacitance CRSS 10 35 pF 3
P-ch Turn-On Delay Time td(ON) 10 ns VDD = -25V, ID = -0.75A, RGEN = 25Ω 3
P-ch Rise Time tr 15 ns 3
P-ch Turn-Off Delay Time td(OFF) 20 ns 3
P-ch Fall Time tf 15 ns 3
P-ch Diode Forward Voltage Drop VSD -1.8 V VGS = 0V, ISD = -0.5A (Note 1) 3
Gate-to-Source Voltage (absolute maximum) -20 20 V 2
Operating Ambient Temperature (absolute maximum) TA -55 150 °C 2
Storage Temperature (absolute maximum) TS -55 150 °C 2
Operating Ambient Temperature TA -55 150 °C 3
Storage Temperature TS -55 150 °C 3
Thermal resistance, junction-to-ambient, 8-lead SOIC θJA 101 °C/W Note 1: 1 oz., four-layer, 3” x 4” PCB 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Pin Number Pin Name Description 1 SN Source N-channel 4

CAD (KiCad official)

  • Symbol: TC2320TG-G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tc2320tg-g-etched.step / tc2320tg-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tc2320tg-g.step / tc2320tg-g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (12 pp, sha256 5fb923c93eb3fe21, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF