tc1410eoa713

@@ -33,5 +33,78 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "TC1410EOA713",+    "manufacturer": "Microchip",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Isolators - Gate Drivers",+    "parts": {+      "symbol": "tc1410eoa713.kicad_sym",+      "footprint": "tc1410eoa713.kicad_mod",+      "model_3d": "tc1410eoa713-etched.glb",+      "model_3d_plain": "tc1410eoa713.glb",+      "model_3d_step": "tc1410eoa713-etched.step",+      "model_3d_step_plain": "tc1410eoa713.step",+      "lbr": "tc1410eoa713.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "VDD",+        "type": "power_in",+        "description": "Bias supply input, 4.5V to 16V. Common to pin 8 - both VDD pins must be tied together. Bypass to GND with a local ceramic capacitor (~1.0 µF recommended, sized to the load being driven)."+      },+      {+        "number": "2",+        "name": "IN",+        "type": "input",+        "description": "High-impedance TTL/CMOS-compatible control input. VIH ≥ 2.0V, VIL ≤ 0.8V, with ~300 mV of hysteresis to prevent output glitching on slow input edges. Withstands negative inputs to −5V."+      },+      {+        "number": "3",+        "name": "NC",+        "type": "unconnected",+        "description": "No internal connection. Leave floating or tie to ground for noise reduction."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground return for bias current and for the high peak currents that discharge the load capacitor. Common to pin 5 - both GND pins must be tied together to a low-impedance ground plane."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Ground return, common to pin 4. Both GND pins must be tied together. Tolerates up to ±5V of ground noise spiking without damage."+      },+      {+        "number": "6",+        "name": "OUT",+        "type": "output",+        "description": "CMOS push-pull driver output, 0.5A peak. RO ≈ 16 Ω typical at VDD = 16V. Inverted with respect to IN (TC1410 is the inverting variant). Common to pin 7 - both OUT pins must be tied together to share the output current. Withstands up to 500 mA of reverse current forced back into the output."+      },+      {+        "number": "7",+        "name": "OUT",+        "type": "output",+        "description": "CMOS push-pull driver output, common to pin 6. Both OUT pins must be tied together for proper operation and full 0.5A peak drive."+      },+      {+        "number": "8",+        "name": "VDD",+        "type": "power_in",+        "description": "Bias supply input, 4.5V to 16V, common to pin 1. Both VDD pins must be tied together. Absolute maximum supply voltage is +20V."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}