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TB9102FNG

Public Made by Adom

by adom

TOSHIBA Motor Driver ICs, SSOP-24-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TB9102FNG

TOSHIBA · Motor Driver ICs · SSOP-24-208mil

TB9102FNG from TOSHIBA, in a SSOP-24-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OC1 output Half-bridge C Out1 driver output with RHON=RLON=0.5Ω (typ.), using HVMOS rated to the same voltage as VMA and VMBC.
2 OC2 output Half-bridge C Out2 driver output with RHON=RLON=0.5Ω (typ.), using HVMOS rated to the same voltage as VMA and VMBC.
3 GNDC power_in Ground return for OC1 and OC2; internally shorted to GNDA, GNDB and GND.
4 TEST1 input Test input with 100kΩ pull-down; connect to GND on the PCB.
5 SO output SPI data output that is Hi-Z while CSB is high and shifts data out on the rising edge of CLK.
6 SI input SPI data input with 100kΩ pull-down, sampled on the falling edge of CLK.
7 CLK input SPI clock input with 100kΩ pull-down, from the external master device.
8 CSB input SPI chip select input with 100kΩ pull-up; SPI communication is enabled when it is low.
9 MODE input Normal/standby or brake select input with 100kΩ pull-down.
10 SEL input Sleep mode control input with 100kΩ pull-down.
11 VDD power_in 5V supply input for CMOS logic; connect VDD and VCC on the PCB.
12 VCC power_in 5V supply input for the bipolar circuit; connect VDD and VCC on the PCB.
13 GND power_in Ground for the 5V circuits; internally shorted to GNDA, GNDB and GNDC.
14 TEST2 output Test output pin with CMOS output that must be kept open.
15 TEST3 input Test input with 100kΩ pull-down; connect to GND on the PCB.
16 GNDA power_in Ground return for OA1 and OA2; internally shorted to GNDB, GNDC and GND.
17 OA1 output Half-bridge A Out1 driver output with RHON=RLON=0.5Ω (typ.), using HVMOS rated to the same voltage as VMA and VMBC.
18 OA2 output Half-bridge A Out2 driver output with RHON=RLON=0.5Ω (typ.), using HVMOS rated to the same voltage as VMA and VMBC.
19 VMA power_in Motor power input for OA1 and OA2, which must be connected to the supply even when only 1ch or 2ch H-bridges are used.
20 NC unconnected No connection; keep open.
21 GNDB power_in Ground return for OB1 and OB2; internally shorted to GNDA, GNDC and GND.
22 OB1 output Half-bridge B Out1 driver output with RHON=RLON=0.5Ω (typ.), using HVMOS rated to the same voltage as VMA and VMBC.
23 OB2 output Half-bridge B Out2 driver output with RHON=RLON=0.5Ω (typ.), using HVMOS rated to the same voltage as VMA and VMBC.
24 VMBC power_in Motor power input for OB1, OB2, OC1 and OC2, which must be connected to the supply even when not all 3ch H-bridges are used.

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SSOP-24-208mil
Category Power Management ICs
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VM -0.3 40 V VMA, VMBC DC Voltage 20
Supply Voltage VDD, VCC VDD, VCC -0.3 6 V VDD, VCC DC Voltage 20
Output Current at Over Current Detection IOUT -1.5 1.5 A OA1, OA2, OB1, OB2, OC1, OC2 at Over Current Detection 20
Output Current SO IOUT -10 10 mA SO 20
Storage Temperature Tstg -55 150 °C 20
Supply Voltage VM VM 7 18 V 21
Supply Voltage VDD, VCC VDD,VCC 4.5 5.5 V Operating range of 5V circuit (Logic circuit, Bipolar) 21
Operating Temperature Topr -40 125 °C 21
Current Consumption (operation) VM I(VM) 1 6 mA OA1/2, OB1/2, OC1/2: OPEN (no load) 21
Current Consumption (operation) VDD+VCC I(VDD+VCC) 1.4 2 mA VDD, VCC (Logic circuit only) 21
Standby Current VM Istby(VM) 1 30 μA at Standby mode (CSB=H, CLK=SI=SEL=MODE=L) each Motor off 21
Standby Current VDD+VCC Istby(VDD+VCC) 3 10 μA 21
Output Voltage Level L VOL(SO) 0.05 0.4 V SO IOL=2.5mA 21
Output OFF Leak Current IO(OFF) -3 3 μA SO CSB=H 21
Input Current Level L CSB IIL1 -100 -50 -10 μA CSB VIN=0V 21
Input Current Level L SI, CLK, MODE, SEL IIL2 -10 10 μA 21
Input Current Level H CSB IIH1 -10 10 μA CSB VIN=VDD 21
Input Current Level H SI, CLK, MODE, SEL IIH2 10 50 100 μA 21
High-side Output ON Resistance RHON 0.5 0.8 Ω IOUT=-0.5A, Ta=+25°C 22
High-side Output ON Resistance RHON 0.7 1.2 Ω IOUT=-0.5A, Ta=125°C 22
High-side Output ON Resistance RHON 0.4 0.6 Ω IOUT=-0.5A, Ta=-40°C 22
Low-side Output ON Resistance RLON 0.5 0.8 Ω IOUT=+0.5A, Ta=+25°C 22
Low-side Output ON Resistance RLON 0.6 1.2 Ω IOUT=+0.5A, Ta=125°C 22
Low-side Output ON Resistance RLON 0.3 0.6 Ω IOUT=+0.5A, Ta=-40°C 22
Output OFF Leak Current ILO -1 μA Output OFF, VOUT=0V, Ta=25°C 22
Output OFF Leak Current ILO -5 μA Output OFF, VOUT=0V, Ta=-40 to 125°C 22
Output OFF Leak Current ILO 1 μA Output OFF, VOUT=VM, Ta=25°C 22
Output OFF Leak Current ILO 5 μA Output OFF, VOUT=VM, Ta=-40 to 125°C 22
Under Voltage Detection RESET OFF Voltage of VCC VRSTH 3.9 4.1 4.3 V VCC 22
Under Voltage Detection RESET ON Voltage of VCC VRSTL 3.8 4 4.2 V VCC 22
Over current detection Current (- short) ISLMAX -2.5 -1.6 -1 A OA1, OA2, OB1, OB2, OC1, OC2 22
Over Current Detection Current (+ short) ISHMAX 1 1.5 2.5 A 22
Over Voltage Detection ON VSDH 24.5 26 27.5 V VMA, VMBC Motor no load 22
Over Voltage Detection OFF VSDL 24 25.5 27 V VMA, VMBC Motor no load 22
Over Temp. Detection ON TSDH 155 170 °C OA1, OA2, OB1, OB2, OC1, OC2; Note2: Design value 22
Motor Output ON time Source (High-side) tdO(on) 4.5 7 μs Rload=100Ω 23
Motor Output OFF time Source (High-side) tdO(off) 2.5 4 μs Rload=100Ω 23
Motor Output ON time Sink (Low-side) tO(on) 4.5 7 μs Rload=100Ω 23
Motor Output OFF time Sink (Low-side) tO(off) 2.5 4 μs Rload=100Ω 23
Rising time Source (High-side) tr(sou) 5 9 μs OA1, OA2, OB1, OB2, OC1, OC2; Rload=100Ω 23
Falling time Source (High-side) tf(sou) 0.2 0.5 μs Rload=100Ω 23
Rising time Sink (Low-side) tr(sin) 0.2 0.5 μs Rload=100Ω 23
Falling time Sink (Low-side) tf(sin) 4 8 μs Rload=100Ω 23
CLK Frequency tpclk 1 MHz CLK 24
CLK High Time tclkh 250 ns 24
CLK LOW Time tclkl 250 ns 24
CSB↓-CLK↑ Set Up Time tlead 10 μs CSB, CLK 24
CLK↓-CSB↑ Set Up Time tlag 100 ns 24
SI Set Up Time tDISU 125 ns CLK, SI 24
SI Hold Time tDIHO 125 ns 24
SO Enable Time tSOENA 10 ns SO, CSB CL=100pF 24
SO Valid Time tVASO 125 ns SI, SO CL=100pF 24
Input Voltage Hysteresis VHYS1 0.5 V 21
Under Voltage Detection RESET Hysteresis Voltage VRSTHYS 0.1 V VRSTHYS=VRSTH-VRSTL 22
Over Temp. Hysteresis TSDHYS 10 °C Note2: Design value 22
DEAD TIME tDEAD 2 μs 23
Thermal Resistance IC (no PCB) Rθj-a 160 °C/W IC (no PCB) at 25°C 20
Thermal Resistance PCB 1 Layer Rθj-a 95 °C/W PCB 1Layer, size 76.2×114.3×t1.6mm, Cu 30%, Cu thickness 35μm 20
Thermal Resistance PCB 4 Layer Rθj-a 60 °C/W PCB 4Layer, size 76.2×114.3×t1.6mm, Cu 30%, Cu thickness 35μm 20

CAD (KiCad official)

  • Symbol: TB9102FNG
  • Footprint: Package_SO:SSOP-24_5.3x8.2mm_P0.65mm
  • 3D model: SSOP-24-208mil (KiCad packages3D, STEP)
  • 3D model files: tb9102fng-etched.step / tb9102fng-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tb9102fng.step / tb9102fng.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (30 pp, sha256 0ca152cac3f2ffbb, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF