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TB67S269FTG

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TOSHIBA Motor Driver ICs, QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TB67S269FTG

TOSHIBA · Motor Driver ICs · QFN-48-EP(7x7)

TB67S269FTG from TOSHIBA, in a QFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected Non-connection pin; do not run patterns under NC pins.
2 CLK input CLK signal input; each up-edge shifts the motor electrical angle by one step, with logic input VIH 2.0 V to 5.5 V and VIL 0 V to 0.8 V.
3 ENABLE input Ach/Bch output stage ON/OFF control; H enables normal operation and L sets the outputs to high impedance, and it must be held L during VM power-on and power-off sequences.
4 RESET input Electric angle reset pin; H sets the electrical angle to its initial condition and L is normal operation.
5 GND power_in Ground pin; connect to the PCB GND area.
6 NC unconnected Non-connection pin; do not run patterns under NC pins.
7 RSA passive Motor Ach current sense pin; connect to the Ach current-sense resistor and to the other RSA pin.
8 RSA passive Motor Ach current sense pin; connect to the Ach current-sense resistor and to the other RSA pin.
9 NC unconnected Non-connection pin; do not run patterns under NC pins.
10 OUTA+ output Motor Ach (+) output pin; motor output rated 50 V and 2.0 A, and must be connected together with the other OUTA+ pin.
11 OUTA+ output Motor Ach (+) output pin; motor output rated 50 V and 2.0 A, and must be connected together with the other OUTA+ pin.
12 NC unconnected Non-connection pin; do not run patterns under NC pins.
13 NC unconnected Non-connection pin; do not run patterns under NC pins.
14 NC unconnected Non-connection pin; do not run patterns under NC pins.
15 GND power_in Ground pin; connect to the PCB GND area.
16 OUTA- output Motor Ach (-) output pin; motor output rated 50 V and 2.0 A, and must be connected together with the other OUTA- pin.
17 OUTA- output Motor Ach (-) output pin; motor output rated 50 V and 2.0 A, and must be connected together with the other OUTA- pin.
18 GND power_in Ground pin; connect to the PCB GND area.
19 GND power_in Ground pin; connect to the PCB GND area.
20 OUTB- output Motor Bch (-) output pin; motor output rated 50 V and 2.0 A, and must be connected together with the other OUTB- pin.
21 OUTB- output Motor Bch (-) output pin; motor output rated 50 V and 2.0 A, and must be connected together with the other OUTB- pin.
22 GND power_in Ground pin; connect to the PCB GND area.
23 NC unconnected Non-connection pin; do not run patterns under NC pins.
24 NC unconnected Non-connection pin; do not run patterns under NC pins.
25 NC unconnected Non-connection pin; do not run patterns under NC pins.
26 OUTB+ output Motor Bch (+) output pin; motor output rated 50 V and 2.0 A, and must be connected together with the other OUTB+ pin.
27 OUTB+ output Motor Bch (+) output pin; motor output rated 50 V and 2.0 A, and must be connected together with the other OUTB+ pin.
28 NC unconnected Non-connection pin; do not run patterns under NC pins.
29 RSB passive Motor Bch current sense pin; connect to the Bch current-sense resistor and to the other RSB pin.
30 RSB passive Motor Bch current sense pin; connect to the Bch current-sense resistor and to the other RSB pin.
31 NC unconnected Non-connection pin; do not run patterns under NC pins.
32 VM power_in Motor power supply pin; operating range 10 V to 47 V with absolute maximum rating 50 V.
33 NC unconnected Non-connection pin; do not run patterns under NC pins.
34 VCC power_out Internal VCC regulator monitor pin; regulated VCC is 4.75 V to 5.25 V (5.0 V typ.) for internal circuit use.
35 NC unconnected Non-connection pin; do not run patterns under NC pins.
36 NC unconnected Non-connection pin; do not run patterns under NC pins.
37 NC unconnected Non-connection pin; do not run patterns under NC pins.
38 LO output Error detect signal output pin (open-drain); goes Low on TSD or ISD and must be pulled up to 3.3 V or 5.0 V.
39 DMODE0 input Step resolution set pin No.0; logic input VIH 2.0 V to 5.5 V and VIL 0 V to 0.8 V.
40 GND power_in Ground pin; connect to the PCB GND area.
41 VREFB input Motor Bch output set pin; Vref input range is 0 V to 3.6 V.
42 VREFA input Motor Ach output set pin; Vref input range is 0 V to 3.6 V.
43 OSCM passive Oscillating circuit frequency for chopping set pin; OSCM frequency setting range is 0.64 MHz to 2.4 MHz.
44 CW/CCW input Motor rotation direction set pin; H selects clockwise and L selects counter clockwise operation.
45 MO output Electric angle monitor pin; digital output that requires an external pull-up of 10 kΩ to 100 kΩ.
46 DMODE1 input Step resolution set pin No.1; logic input VIH 2.0 V to 5.5 V and VIL 0 V to 0.8 V.
47 DMODE2 input Step resolution set pin No.2; logic input VIH 2.0 V to 5.5 V and VIL 0 V to 0.8 V.
48 NC unconnected Non-connection pin; do not run patterns under NC pins.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package QFN-48-EP(7x7)
Category Power Management ICs
Pins 49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Motor power supply VM 50 V 21
Motor output voltage Vout 50 V 21
Motor output current Iout 2 A Note 1 21
Internal logic power supply VCC 6 V When externally applied. 21
Logic input voltage high VIN(H) 6 V 21
Logic input voltage low VIN(L) -0.4 V 21
MO output voltage VMO 6 V 21
LO output voltage VLO 6 V 21
MO inflow current IMO 30 mA 21
LO inflow current ILO 30 mA 21
Power dissipation WQFN48 PD 1.3 W Note 2 (device alone, Ta=25°C) 21
Operating temperature TOPR -20 85 °C 21
Storage temperature TSTG -55 150 °C 21
Junction temperature Tj(max) 150 °C 21
Motor power supply operating range VM 10 24 47 V Ta=-20 to 85°C 22
Motor output current operating Iout 1.4 2 A Note 1 22
Logic input voltage high operating VIN(H) 2 5.5 V Logic input High Level 22
Logic input voltage low operating VIN(L) 0 0.8 V Logic input Low Level 22
MO output pin voltage operating VMO 3.3 5 V 22
LO output pin voltage operating VLO 3.3 5 V 22
Clock input frequency fCLK 100 kHz 22
Chopper frequency range fchop(range) 40 70 150 kHz 22
Vref input voltage Vref 2 3.6 V 22
Logic input voltage high VIN(H) 2 5.5 V Logic input (Note) 22
Logic input voltage low VIN(L) 0 0.8 V Logic input (Note) 22
Logic input hysteresis voltage VIN(HYS) 100 300 mV Logic input (Note) 22
Logic input current low IIN(L) 1 µA VIN(L)=0V 22
MO output pin voltage low VOL(MO) 0.2 0.5 V IOL=24mA output=Low 22
LO output pin voltage low VOL(LO) 0.2 0.5 V IOL=24mA output=Low 22
Power consumption standby mode IM1 2 3 mA Output pins=open Standby mode 22
Power consumption standby release IM2 3 5 mA Output pins=open Standby release ENABLE=Low 22
Power consumption full step resolution IM3 5 7 mA Output pins=open Full step resolution 22
Output leakage current high-side IOH 1 µA VRS=VM=50V,Vout=0V 22
Output leakage current low-side IOL 1 µA VRS=VM=Vout=50V 22
Motor current channel differential ΔIout1 -5 0 5 % Current differential between Ch 22
Motor current setting accuracy ΔIout2 -5 0 5 % Iout=1.5A 22
RS pin current IRS 0 10 µA VRS=VM=24V 22
Motor output ON-resistance high+low side Ron(H+L) 0.8 0.9 Ω Tj=25°C, Forward direction 22
Vref input current Iref 0 1 µA Vref=2.0V 23
VCC voltage VCC 4.75 5 5.25 V ICC=5.0mA 23
VCC current ICC 2.5 5 mA VCC=5.0V 23
Thermal shutdown threshold TjTSD 145 160 175 °C 23
VM recovery voltage VMR 7 8 9 V 23
Over-current detection (ISD) threshold ISD 2.1 3 4 A 23
CLK input minimum high width tCLK(H) 300 ns The CLK(H) minimum pulse width 24
CLK input minimum low width tCLK(L) 250 ns The CLK(L) minimum pulse width 24
Analog noise blanking time AtBLK 250 400 550 ns VM=24V,Iout=1.5A 24
Oscillator frequency accuracy ΔfOSCM -15 15 % COSC=270pF, ROSC=5.1 kΩ 24
Oscillator reference frequency fOSCM 952 1120 1288 kHz COSC= 270 pF, ROSC =5.1 kΩ 24

CAD (KiCad official)

  • Symbol: TB67S269FTG
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: QFN-48-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: tb67s269ftg-etched.step / tb67s269ftg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tb67s269ftg.step / tb67s269ftg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (29 pp, sha256 cb34d2c603ab663e, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF