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TB67H451FNG

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by adom

TOSHIBA Brushed DC Motor Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TB67H451FNG

TOSHIBA · Brushed DC Motor Drivers · SOIC-8

TB67H451FNG from TOSHIBA, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin; all grounding wires must run on the solder mask of the PCB and be externally terminated at a single point.
2 IN2 input Logic input pin 2; VIN(H) is 2.0 V (min) to 5.5 V (max) and VIN(L) is 0 V (min) to 0.8 V (max).
3 IN1 input Logic input pin 1; VIN(H) is 2.0 V (min) to 5.5 V (max) and VIN(L) is 0 V (min) to 0.8 V (max).
4 VREF power_in Motor output current setting pin; the applied voltage range is 0 V to 4.0 V, with 2.0 V to 4.0 V specified for constant current drive.
5 VM power_in Motor power supply; the operating range is 4.5 V (min) to 44 V (max), and it is rated at 50 V (non-active, standby mode).
6 OUT1 output Motor output pin 1; the OUT pin voltage range is 4.5 V (min) to 50 V (max), and the motor output current is rated at 3.5 A absolute maximum.
7 RS input Motor output current sense pin; it connects to the current-sensing resistor RRS, and must be connected to GND if constant current control is disabled.
8 OUT2 output Motor output pin 2; the OUT pin voltage range is 4.5 V (min) to 50 V (max), and the motor output current is rated at 3.5 A absolute maximum.

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SOIC-8
Category Motor Driver ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Motor power supply (non active) VM 50 V Standby mode 11
Motor power supply (active) VM -0.4 44 V Operation mode 11
Motor output voltage Vout 50 V 11
Motor output current Iout 3.5 A Note 1 11
Logic input pin voltage HIGH VIN(H) 6 V 11
Logic input pin voltage LOW VIN(L) -0.4 V 11
VREF pin voltage Vref 0 5.5 V 11
Power dissipation PD 2.85 W Note 2: on PCB (JEDEC 4 layers) 11
Operating temperature Topr -40 85 °C 11
Storage temperature Tstg -55 150 °C 11
Junction temperature Tj 150 °C 11
Motor power supply voltage VM 4.5 24 44 V Ta=-40 to 85°C 11
Motor output current Iout 1.5 3 A Ta=-40 to 85°C 11
Input range of control logic frequency fLOGIC 400 kHz IN1, IN2 11
Input range of Vref voltage Vref 0 2 4 V Constant current drive 11
Input voltage HIGH VIN(H) 2 5.5 V Logic input pins 12
Input voltage LOW VIN(L) 0 0.8 V Logic input pins 12
Input hysteresis VIN(HYS) 100 300 mV Logic input pins (Note 1) 12
Input current HIGH IIN(H) 33 55 μA Test logic input pins: 3.3 V 12
Input current LOW IIN(L) 1 μA Test logic input pins: 0 V 12
Current consumption (standby mode) IM1 1 μA Output: Open; Standby mode (IN1/IN2=Low) 12
Current consumption (brake mode) IM2 3 4 mA Output: Open; Brake mode (IN1/IN2=High) 12
Current consumption (PWM operation) IM3 3.5 5 mA Output: Open; fPWM=30kHz 12
Motor output leakage current HIGH IOH 1 μA VM=50 V, Vout=0 V; Standby mode (IN1/IN2=Low) 12
Motor output leakage current LOW IOL -1 μA VM=Vout=50 V; Standby mode (IN1/IN2=Low) 12
Output setting current accuracy ΔIout -5 0 5 % Iout=1.5 A 12
RS pin current IRS 0 1 μA VRS=0V, VM=24 V; Standby mode (IN1/IN2=Low) 12
On-resistance between drain and source (High side + low side) Ron(H+L) 0.6 0.8 Ω Tj=25°C, Forward direction (High side + low side); Iout=1.5 A 12
VREF pin input current Iref 0 1 μA Vref=2.0 V 13
Thermal shutdown (TSD) circuit operating temperature TjTSD 150 160 175 °C 13
Thermal shutdown (TSD) hysteresis TjTSDhys 30 °C 13
UVLO voltage VUVLO 3.8 4 4.2 V At rising VM 13
UVLO hysteresis voltage Vhys_uvlo 200 mV 13
Over current detection (ISD) circuit operating current ISD 4.1 4.9 5.7 A 13
Minimum input pulse width of IN1 and IN2 (tw(H)) tw(H) 500 ns 15
Minimum input pulse width of IN1 and IN2 (tw(L)) tw(L) 500 ns 15
Output transistor rise time tr 30 60 120 ns Output load 6.8 mH/5.7 Ω, VM=24 V, Ta=25°C 15
Output transistor fall time tf 40 80 160 ns Output load 6.8 mH/5.7 Ω, VM=24 V, Ta=25°C 15
Fixed OFF time toff 19 25 36 μs 15
Time to standby tstby 0.7 1 1.5 ms IN1=IN2=Low 15
Standby return time 30 μs 15
Mask time of thermal shutdown (TSD) tTSD(mask) 2 5 8 μs 15
Blanking time of noise rejection tBLK 3.6 μs 15
Mask time of over current detection (ISD) tISD(mask) 1.5 μs 15
OFF time of over current detection (ISD) tISD(off) 3 ms 15
Propagation delay LH (IN to OUT) tpLH 500 ns IN1 and IN2 - OUT 15
Propagation delay HL (IN to OUT) tpHL 500 ns IN1 and IN2 - OUT 15

CAD (KiCad official)

  • Symbol: TB67H451FNG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tb67h451fng-etched.step / tb67h451fng-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tb67h451fng.step / tb67h451fng.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (21 pp, sha256 d51420ca7d360850, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF