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T835-800B

STMicroelectronics · Thyristors (SCR)/Modules · DPAK

T835-800B from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 passive Main terminal A1, the reference terminal for gate triggering; the datasheet gives IGT, VGT and other limits with A2 referenced to A1 (T835-800B: IGT max 35 mA, VGT max 1.2 V).
2 A2 passive Main terminal A2, which is also connected to the tab; the device has a repetitive peak off-state voltage VDRM/VRRM of 800 V for the -800B version and an on-state RMS current of 8 A.
3 G input Gate trigger input; the T835 triggers in quadrants I-II-III with IGT max 35 mA at VD = 12 V, RL = 30 ohm, and peak gate current is limited to 4 A (tp = 20 µs).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package DPAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: T835-800B
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: t835-800b-etched.step / t835-800b-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); t835-800b.step / t835-800b.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (21 pp, sha256 ad680880278c15e3, retrieved 2026-10-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF