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T2050H-6G-TR

STMicroelectronics · Thyristors (SCR)/Modules · D2PAK

T2050H-6G-TR from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 passive Main terminal 1, the reference terminal for all A2 ratings, with both polarities of A2 referenced to A1 (Table 2 footnote 2).
2 A2 passive Main terminal 2 carrying the on-state current, rated for VDRM/VRRM of 600 V and IT(RMS) of 20 A at Tc = 128 °C for the D2PAK package.
3 G input Gate, with a peak gate current limit IGM of 4 A (tp = 20 µs, Tj = 150 °C), an average gate power limit PG(AV) of 1 W, and a maximum IGT of 50 mA for the T2050H.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package D2PAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: T2050H-6G-TR
  • Footprint: Package_TO_SOT_SMD:TO-263-2
  • 3D model: D2PAK (KiCad packages3D, STEP)
  • 3D model files: t2050h-6g-tr-etched.step / t2050h-6g-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); t2050h-6g-tr.step / t2050h-6g-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (13 pp, sha256 1c1859af1e047754, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF