# SZMMBZ20VALT1G

**onsemi** · ESD And Surge Protection (TVS/ESD) · SOT-23

SZMMBZ20VALT1G from onsemi, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CATHODE 1 | passive | Cathode of the first of the two monolithic Zener junctions; it is used with pin 3 for one unidirectional protected line (circuit tied to pins 1 and 3). |
| 2 | CATHODE 2 | passive | Cathode of the second Zener junction; it is used with pin 3 for the second unidirectional protected line (circuit tied to pins 2 and 3). |
| 3 | ANODE | passive | Common anode shared by both Zener junctions, serving as the return for the two protected lines in the unidirectional configuration. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Power Dissipation @ 1.0 ms | Ppk |  |  | 40 | W | @ TL ≤ 25°C, 1.0 ms (Note 1); 40 W group MMBZ12VALT1G thru MMBZ47VALT1G | 2 |
| Total Power Dissipation on FR-5 Board | PD |  |  | 225 | mW | @ TA = 25°C (Note 2) | 2 |
| Total Power Dissipation on Alumina Substrate | PD |  |  | 300 | mW | @ TA = 25°C (Note 3) | 2 |
| Junction and Storage Temperature Range | TJ, Tstg | -55 |  | 150 | °C |  | 2 |
| Lead Solder Temperature - Maximum | TL |  |  | 260 | °C | 10 second duration | 2 |
| Thermal Resistance Junction-to-Ambient (FR-5 Board) | RθJA |  | 556 |  | °C/W | FR-5 board (Note 2) | 2 |
| Thermal Resistance Junction-to-Ambient (Alumina Substrate) | RθJA |  | 417 |  | °C/W | Alumina substrate (Note 3) | 2 |
| Power Derating above 25°C (FR-5 Board) |  |  | 1.8 |  | mW/°C | derate above TA = 25°C, FR-5 board | 2 |
| Power Derating above 25°C (Alumina Substrate) |  |  | 2.4 |  | mW/°C | derate above TA = 25°C, alumina substrate | 2 |
| Breakdown Voltage (5% tolerance, 40 W group) | VBR | 19 | 20 | 21 | V | @ IT = 1.0 mA, TA = 25°C (Note 4) | 3 |
| Maximum Reverse Leakage Current | IR |  |  | 50 | nA | @ VRWM = 17 V | 3 |
| Clamping Voltage @ IPP | VC |  |  | 28 | V | @ IPP = 1.4 A; surge per Figure 6, derate per Figure 7 (Note 6) | 3 |
| Maximum Reverse Peak Pulse Current | IPP |  |  | 1.4 | A |  | 3 |
| Maximum Temperature Coefficient of VBR | VBR |  |  | 17.2 | mV/°C |  | 3 |
| Forward Voltage | VF |  |  | 0.9 | V | @ IF = 10 mA | 3 |

## CAD (KiCad official)

- Symbol: `SZMMBZ20VALT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `szmmbz20valt1g-etched.step` / `szmmbz20valt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `szmmbz20valt1g.step` / `szmmbz20valt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603034568358715392) (8 pp, sha256 `5cb1c4fad5e02c73`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/szmmbz20valt1g-datasheet.pdf)