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Ray Publish 0.1.0 3c23a2b 6h ago

SZESD7205WTT1G

onsemi · ESD Protection Devices · SOT-323

SZESD7205WTT1G from onsemi, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I/O1 passive ESD-protected I/O line 1 (Pin 1), flow-through, with 0.34 pF typ to 0.47 pF typ junction capacitance to GND and 5.0 V reverse working voltage.
2 I/O2 passive ESD-protected I/O line 2 (Pin 2), flow-through, with 5.0 V reverse working voltage and capacitance matched to I/O1 within 5% typ, 10% max.
3 GND power_in Ground reference (Pin 3) common to both I/O protection diodes.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-323
Category Circuit Protection
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Junction Temperature Range TJ -55 125 °C TJ = 25°C unless otherwise noted 1
Storage Temperature Range Tstg -55 150 °C 1
Lead Solder Temperature - Maximum (10 Seconds) TL 260 °C 10 seconds 1
ESD IEC 61000-4-2 Contact ESD -25 25 kV IEC 61000-4-2 Contact 1
ESD IEC 61000-4-2 Air ESD -25 25 kV IEC 61000-4-2 Air 1
ESD ISO 10605 330 pF / 330 Ω Contact ESD -20 20 kV ISO 10605 330 pF / 330 Ω Contact 1
ESD ISO 10605 330 pF / 2 kΩ Contact ESD -30 30 kV ISO 10605 330 pF / 2 kΩ Contact 1
ESD ISO 10605 150 pF / 2 kΩ Contact ESD -30 30 kV ISO 10605 150 pF / 2 kΩ Contact 1
Reverse Working Voltage VRWM 5 V I/O Pin to GND 2
Breakdown Voltage VBR 5.2 6 8 V IT = 1 mA, I/O Pin to GND 2
Reverse Leakage Current IR 1 A VRWM = 5.0 V, I/O Pin to GND 2
Junction Capacitance Match CJ 5 10 % VR = 0 V, f = 1 MHz between I/O1 to GND and I/O2 to GND 2
Junction Capacitance, I/O Pins to GND (ESD7205WTT1G) CJ 0.47 0.85 pF VR = 0 V, f = 1 MHz between I/O Pins and GND 2
Junction Capacitance, between I/O Pins (ESD7205WTT1G) CJ 0.23 0.4 pF VR = 0 V, f = 1 MHz between I/O Pins 2
Clamping Voltage TLP VC 10 V IPP = 8 A 2
Clamping Voltage TLP VC 12.5 V IPP = 16 A 2
Clamping Voltage TLP VC -4 V IPP = -8 A 2
Clamping Voltage TLP VC -8 V IPP = -16 A 2
3dB Bandwidth fBW 5 GHz RL = 50 Ω 2

CAD (KiCad official)

  • Symbol: SZESD7205WTT1G
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323 (KiCad packages3D, STEP)
  • 3D model files: szesd7205wtt1g-etched.step / szesd7205wtt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); szesd7205wtt1g.step / szesd7205wtt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 8e6333c0ecf5f998, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF