# SYN500R

**JSMSEMI** · RF Transceiver ICs · SSOP-16-150mil

SYN500R from JSMSEMI, in a SSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RO1 | input | External crystal reference input 1, one of the two reference-oscillator pins (RO1/RO2); the datasheet gives no further limits for this pin. |
| 2 | GND | power_in | Ground; all voltages in the datasheet are referenced to GND. |
| 3 | ANT | input | RF input from the antenna; the maximum input power is 10 dBm in the absolute maximum ratings and 0 dBm in the recommended operating conditions, and its DC voltage must stay between -0.3 V and VDD+0.3 V. |
| 4 | GND | power_in | Ground; all voltages in the datasheet are referenced to GND. |
| 5 | VDD | power_in | Supply voltage, 2.0 V to 5.0 V recommended (6 V absolute maximum); the datasheet recommends a 0.1 μF decoupling capacitor placed close to the device and a 47 Ω series resistor on 5 V applications. |
| 6 | SQ | input | Squelch enable: low enables the squelch function, high disables it, and its DC voltage must stay between -0.3 V and VDD+0.3 V. |
| 7 | SEL0 | input | Select bit 0 for the data-rate/bandwidth setting (together with SEL1), which sets the recommended maximum data rate and the squelch threshold; its DC voltage must stay between -0.3 V and VDD+0.3 V. |
| 8 | SHDN | input | Power-saving mode enable: high puts the device into power-saving mode with total current below 1 μA, and low gives normal operation; its DC voltage must stay between -0.3 V and VDD+0.3 V. |
| 9 | GND | power_in | Ground; all voltages in the datasheet are referenced to GND. |
| 10 | DO | output | Decoded data output; the datasheet gives a 0.8*VDD high-level output current of 235 μA and a 0.2*VDD low-level output current of 400 μA, with rise and fall times of 600 ns and 250 ns at 15 pF load. |
| 11 | SEL1 | input | Select bit 1 for the data-rate/bandwidth setting (together with SEL0); its DC voltage must stay between -0.3 V and VDD+0.3 V. |
| 12 | CTH | passive | Reference voltage pin used with an external capacitor; the datasheet test condition uses CTH = 0.1 μF. |
| 13 | CAGC | passive | AGC capacitor pin; it sources 120 μA during power-up fast settling, and the recommended capacitance depends on SEL1/SEL0 (4.7 μF, 2.2 μF, 1 μF or 0.47 μF). |
| 14 | RSSI | output | Received signal strength indicator output, with an output voltage of 0.5 V to 1 V and an output current of about 400 μA, and a response time of about 100 ms. |
| 15 | NC | unconnected | No connection. |
| 16 | RO2 | input | External crystal reference input 2, the second of the reference-oscillator pins (RO1/RO2); the datasheet gives no further limits for this pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | SSOP-16-150mil |
| Category | RF And Wireless |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply current (fRF=315MHz) | ICC |  | 4.5 | 6 | mA | fRF=315MHz | 3 |
| Supply current (fRF=433MHz) | ICC |  | 5.5 | 6 | mA | fRF=433MHz | 3 |
| Supply current in shutdown | ICC |  |  | 1 | μA | SHDN=“1” | 3 |
| Operating frequency | fRF | 300 |  | 450 | MHz |  | 3 |
| Reference signal input amplitude | VREF | 0.2 |  | 1.5 | VP-P |  | 3 |
| Bit rate | BR |  |  | 20 | Kbps |  | 3 |
| RSSI output voltage | VRSSI | 0.5 |  | 1 | V |  | 3 |
| Supply voltage | VDD |  |  | 6 | V |  | 2 |
| Storage temperature |  | -65 |  | 150 | ℃ |  | 2 |
| DC voltage on ANT, SQ, SEL0, SEL1, SHDN |  | -0.3 |  |  | V | Voltages referenced to GND; printed maximum is VDD+0.3 | 2 |
| Maximum input power |  |  |  | 10 | dBm |  | 2 |
| Lead soldering temperature (10 s) |  |  |  | 250 | ℃ | Soldering, 10 s | 2 |
| Junction temperature |  |  |  | 150 | ℃ |  | 2 |
| Supply voltage | VDD | 2 |  | 5 | V |  | 3 |
| Operating temperature range |  | -40 |  | 85 | ℃ |  | 3 |
| DC voltage on ANT, SQ, SEL0, SEL1, SHDN |  | -0.3 |  |  | V | Printed maximum is VDD+0.3 | 3 |
| Maximum input power |  |  |  | 0 | dBm |  | 3 |
| Modulation duty cycle |  | 20 |  | 80 |  |  | 3 |
| Frequency range |  | 300 |  | 450 | MHz |  | 3 |

## CAD (KiCad official)

- Symbol: `SYN500R`
- Footprint: `Package_SO:SSOP-16_5.3x6.2mm_P0.65mm`
- 3D model: SSOP-16-150mil (KiCad packages3D, STEP)
- 3D model files: `syn500r-etched.step` / `syn500r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `syn500r.step` / `syn500r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [JSMSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588950318202044416) (10 pp, sha256 `e13f03ec5a345f96`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/syn500r-datasheet.pdf)