component
SY8891ARC
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Silergy Corp DC-DC Converters, SOT-563-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SY8891ARC
Silergy Corp · DC-DC Converters · SOT-563-6
SY8891ARC from Silergy Corp, in a SOT-563-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Output feedback pin, connected to the center of the output resistor divider to set VOUT = 0.6 × (1 + RH/RL), with feedback reference VREF of 0.591 V to 0.609 V (0.6 V typical). |
| 2 | GND | power_in | Ground pin. |
| 3 | VIN | power_in | Input supply pin, decoupled to GND with at least a 10µF ceramic capacitor; the recommended supply input range is 2.5 V to 5.5 V. |
| 4 | LX | output | Inductor pin connected to the switching node of the inductor; LX voltage is rated -0.3 V (tested to -3 V for under 20 ns) to 6.0 V (tested to +7 V for under 20 ns). |
| 5 | EN | input | Enable control: pull high to turn the regulator on (VEN,H 1.2 V minimum, VEN,L 0.4 V maximum) and do not leave it floating. |
| 6 | PG | output | Power good indicator, an open-drain output that goes low when the output is below 90% or above 120% of the regulation voltage and requires a pull-up resistor to the input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SOT-563-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
SY8891ARC - Footprint:
Package_TO_SOT_SMD:SOT-563 - 3D model: SOT-563-6 (KiCad packages3D, STEP)
- 3D model files:
sy8891arc-etched.step/sy8891arc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sy8891arc.step/sy8891arc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Silergy Corp datasheet (6 pp, sha256
ecd48554b93bb8f2, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SY8891ARC
**Silergy Corp** · DC-DC Converters · SOT-563-6
SY8891ARC from Silergy Corp, in a SOT-563-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Output feedback pin, connected to the center of the output resistor divider to set VOUT = 0.6 × (1 + RH/RL), with feedback reference VREF of 0.591 V to 0.609 V (0.6 V typical). |
| 2 | GND | power_in | Ground pin. |
| 3 | VIN | power_in | Input supply pin, decoupled to GND with at least a 10µF ceramic capacitor; the recommended supply input range is 2.5 V to 5.5 V. |
| 4 | LX | output | Inductor pin connected to the switching node of the inductor; LX voltage is rated -0.3 V (tested to -3 V for under 20 ns) to 6.0 V (tested to +7 V for under 20 ns). |
| 5 | EN | input | Enable control: pull high to turn the regulator on (VEN,H 1.2 V minimum, VEN,L 0.4 V maximum) and do not leave it floating. |
| 6 | PG | output | Power good indicator, an open-drain output that goes low when the output is below 90% or above 120% of the regulation voltage and requires a pull-up resistor to the input. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SOT-563-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `SY8891ARC`
- Footprint: `Package_TO_SOT_SMD:SOT-563`
- 3D model: SOT-563-6 (KiCad packages3D, STEP)
- 3D model files: `sy8891arc-etched.step` / `sy8891arc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sy8891arc.step` / `sy8891arc.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Silergy Corp datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589785281311645696) (6 pp, sha256 `ecd48554b93bb8f2`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sy8891arc-datasheet.pdf)