← Commit history

Initial commit: component/sy8513fcc

Ray ·9ec4823201 ·
2 files changed +82
README.mdadded+48
@@ -0,0 +1,48 @@+# SY8513FCC++**Silergy Corp** · DC-DC Converters · SOP-8-EP++SY8513FCC from Silergy Corp, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN | power_in | Input supply pin, 4.5V to 100V range (abs max 100V). Decouple to GND with at least a 1μF ceramic capacitor placed close to the pin. |+| 2 | EN | input | Enable control input. Pull high to turn on the converter (V_EN,R typ 1.1V rising, V_EN,F typ 0.9V falling). Do not leave floating. Abs max -0.3V to VIN+0.3V. |+| 3 | FS | input | Switching frequency programming pin. Connect a resistor from FS to GND to set fSW between 100kHz and 500kHz per fSW(kHz) = 1e5 / RFS(kΩ). RFS range 200kΩ to 1MΩ. |+| 4 | GND | power_in | Device ground reference. Tie to system ground plane; exposed pad must also be connected to this pin/ground. |+| 5 | FB | input | Output voltage feedback input to the error amplifier. Connect to the center tap of the output resistor divider to set VOUT = 0.8V × (1 + R1/R2). VREF = 0.8V ±1%; IFB ±50nA. |+| 6 | PG | output | Power-good indicator, open-drain output. Asserts (pulled low released to Hi-Z) when the FB voltage is within approximately 90% to 120% of the regulation point. Requires an external pull-up resistor; V_PG,L = 0.3V at 2mA. |+| 7 | BS | passive | Bootstrap capacitor pin supplying the high-side gate driver. Connect a 0.1μF ceramic capacitor between BS and LX. Abs max BS-LX = 6V. |+| 8 | LX | output | Switching node; drain of internal N-channel top FET (RDS(ON) 150mΩ). Connect to the external inductor and freewheeling Schottky diode. Handles up to 3A output; dynamic voltage rating VIN+3V to GND-5V for 10ns. |+| EP | EPAD | power_in | Exposed thermal pad on the bottom of the SO8E package. Must be connected to the GND pin and to the system ground plane for optimal thermal performance (θJA = 42°C/W, θJC = 4°C/W). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Silergy Corp |+| Package | SOP-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `SY8513FCCFCC`++## CAD (KiCad official)++- Symbol: `SY8513FCC`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Silergy Corp datasheet](docs/sy8513fcc-datasheet.pdf) (6 pp, sha256 `6ddffce45b3660b0`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sy8513fcc-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "sy8513fcc",+  "version": "0.1.0",+  "type": "component",+  "description": "Silergy Corp DC-DC Converters, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "sy8513fcc"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sy8513fcc.kicad_sym",+    "sy8513fcc.kicad_mod",+    "sy8513fcc.glb",+    "sy8513fcc.step",+    "sy8513fcc.lbr",+    "docs/hero.png",+    "docs/sy8513fcc-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file