SY8513FCC

@@ -26,13 +26,15 @@       "model_3d_step": "sy8513fcc.step",       "lbr": "sy8513fcc.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "lcsc": "C3034281"+    },     "pins": [       {         "number": "1",         "name": "IN",         "type": "power_in",-        "description": "Input supply pin, 4.5V to 100V range (abs max 100V). Decouple to GND with at least a 1μF ceramic capacitor placed close to the pin."+        "description": "Input supply pin, 4.5V to 100V range (abs max 100V). Decouple to GND with at least a 1\u03bcF ceramic capacitor placed close to the pin."       },       {         "number": "2",@@ -44,7 +46,7 @@         "number": "3",         "name": "FS",         "type": "input",-        "description": "Switching frequency programming pin. Connect a resistor from FS to GND to set fSW between 100kHz and 500kHz per fSW(kHz) = 1e5 / RFS(kΩ). RFS range 200kΩ to 1MΩ."+        "description": "Switching frequency programming pin. Connect a resistor from FS to GND to set fSW between 100kHz and 500kHz per fSW(kHz) = 1e5 / RFS(k\u03a9). RFS range 200k\u03a9 to 1M\u03a9."       },       {         "number": "4",@@ -56,7 +58,7 @@         "number": "5",         "name": "FB",         "type": "input",-        "description": "Output voltage feedback input to the error amplifier. Connect to the center tap of the output resistor divider to set VOUT = 0.8V × (1 + R1/R2). VREF = 0.8V ±1%; IFB ±50nA."+        "description": "Output voltage feedback input to the error amplifier. Connect to the center tap of the output resistor divider to set VOUT = 0.8V \u00d7 (1 + R1/R2). VREF = 0.8V \u00b11%; IFB \u00b150nA."       },       {         "number": "6",@@ -68,19 +70,19 @@         "number": "7",         "name": "BS",         "type": "passive",-        "description": "Bootstrap capacitor pin supplying the high-side gate driver. Connect a 0.1μF ceramic capacitor between BS and LX. Abs max BS-LX = 6V."+        "description": "Bootstrap capacitor pin supplying the high-side gate driver. Connect a 0.1\u03bcF ceramic capacitor between BS and LX. Abs max BS-LX = 6V."       },       {         "number": "8",         "name": "LX",         "type": "output",-        "description": "Switching node; drain of internal N-channel top FET (RDS(ON) 150mΩ). Connect to the external inductor and freewheeling Schottky diode. Handles up to 3A output; dynamic voltage rating VIN+3V to GND-5V for 10ns."+        "description": "Switching node; drain of internal N-channel top FET (RDS(ON) 150m\u03a9). Connect to the external inductor and freewheeling Schottky diode. Handles up to 3A output; dynamic voltage rating VIN+3V to GND-5V for 10ns."       },       {         "number": "9",         "name": "EPAD",         "type": "power_in",-        "description": "Exposed thermal pad on the bottom of the SO8E package. Must be connected to the GND pin and to the system ground plane for optimal thermal performance (θJA = 42°C/W, θJC = 4°C/W).",+        "description": "Exposed thermal pad on the bottom of the SO8E package. Must be connected to the GND pin and to the system ground plane for optimal thermal performance (\u03b8JA = 42\u00b0C/W, \u03b8JC = 4\u00b0C/W).",         "source": "renumbered-to-footprint-pad"       }     ],

@@ -63,6 +63,12 @@   <smd name="7" x="2.4975" y="0.6350" dx="1.5050" dy="0.8020" layer="1"/>   <smd name="8" x="2.4975" y="1.9050" dx="1.5050" dy="0.8020" layer="1"/>   <smd name="9" x="0.0000" y="-0.0000" dx="2.6130" dy="3.5020" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-2.5000" y="2.5750"/>+    <vertex x="-2.7400" y="2.9050"/>+    <vertex x="-2.2600" y="2.9050"/>+    <vertex x="-2.5000" y="2.5750"/>+  </polygon>   <wire x1="-2.0750" y1="2.5750" x2="2.0750" y2="2.5750" width="0.1500" layer="21"/>   <wire x1="-2.0750" y1="-2.5750" x2="2.0750" y2="-2.5750" width="0.1500" layer="21"/>   <wire x1="-1.9500" y1="1.4500" x2="-0.9500" y2="2.4500" width="0.1500" layer="51"/>@@ -72,7 +78,7 @@   <wire x1="1.9500" y1="-2.4500" x2="-1.9500" y2="-2.4500" width="0.1500" layer="51"/>   <text x="0" y="3.257" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-3.257" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.5000" y="2.5750"/><vertex x="-2.7400" y="2.9050"/><vertex x="-2.2600" y="2.9050"/><vertex x="-2.5000" y="2.5750"/></polygon></package>+</package> </packages> <symbols> <symbol name="SY8513FCC">@@ -112,7 +118,13 @@         <connect gate="G$1" pin="FB" pad="5"/>         <connect gate="G$1" pin="EPAD" pad="9"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="SY8513FCC" constant="no"/>+          <attribute name="MANUFACTURER" value="Silergy Corp" constant="no"/>+          <attribute name="LCSC_PN" value="C3034281" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>