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Set visibility: public

Ray ·059a234d55 · ·parent f86cb9b
1 file changed +10−7
page.json+10−7
@@ -32,7 +32,7 @@         "number": "1",         "name": "IN",         "type": "power_in",-        "description": "Input supply pin, 4.5V to 100V range (abs max 100V). Decouple to GND with at least a 1\u03bcF ceramic capacitor placed close to the pin."+        "description": "Input supply pin, 4.5V to 100V range (abs max 100V). Decouple to GND with at least a 1μF ceramic capacitor placed close to the pin."       },       {         "number": "2",@@ -44,7 +44,7 @@         "number": "3",         "name": "FS",         "type": "input",-        "description": "Switching frequency programming pin. Connect a resistor from FS to GND to set fSW between 100kHz and 500kHz per fSW(kHz) = 1e5 / RFS(k\u03a9). RFS range 200k\u03a9 to 1M\u03a9."+        "description": "Switching frequency programming pin. Connect a resistor from FS to GND to set fSW between 100kHz and 500kHz per fSW(kHz) = 1e5 / RFS(kΩ). RFS range 200kΩ to 1MΩ."       },       {         "number": "4",@@ -56,7 +56,7 @@         "number": "5",         "name": "FB",         "type": "input",-        "description": "Output voltage feedback input to the error amplifier. Connect to the center tap of the output resistor divider to set VOUT = 0.8V \u00d7 (1 + R1/R2). VREF = 0.8V \u00b11%; IFB \u00b150nA."+        "description": "Output voltage feedback input to the error amplifier. Connect to the center tap of the output resistor divider to set VOUT = 0.8V × (1 + R1/R2). VREF = 0.8V ±1%; IFB ±50nA."       },       {         "number": "6",@@ -68,19 +68,19 @@         "number": "7",         "name": "BS",         "type": "passive",-        "description": "Bootstrap capacitor pin supplying the high-side gate driver. Connect a 0.1\u03bcF ceramic capacitor between BS and LX. Abs max BS-LX = 6V."+        "description": "Bootstrap capacitor pin supplying the high-side gate driver. Connect a 0.1μF ceramic capacitor between BS and LX. Abs max BS-LX = 6V."       },       {         "number": "8",         "name": "LX",         "type": "output",-        "description": "Switching node; drain of internal N-channel top FET (RDS(ON) 150m\u03a9). Connect to the external inductor and freewheeling Schottky diode. Handles up to 3A output; dynamic voltage rating VIN+3V to GND-5V for 10ns."+        "description": "Switching node; drain of internal N-channel top FET (RDS(ON) 150mΩ). Connect to the external inductor and freewheeling Schottky diode. Handles up to 3A output; dynamic voltage rating VIN+3V to GND-5V for 10ns."       },       {         "number": "EP",         "name": "EPAD",         "type": "power_in",-        "description": "Exposed thermal pad on the bottom of the SO8E package. Must be connected to the GND pin and to the system ground plane for optimal thermal performance (\u03b8JA = 42\u00b0C/W, \u03b8JC = 4\u00b0C/W)."+        "description": "Exposed thermal pad on the bottom of the SO8E package. Must be connected to the GND pin and to the system ground plane for optimal thermal performance (θJA = 42°C/W, θJC = 4°C/W)."       }     ],     "provenance": {@@ -144,5 +144,8 @@     "docs/sy8513fcc-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file