SY8205FCC - Commit

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sy8205fcc: publish the laser-etched STEP alongside the bare one

Ray ·89bcaf62c2 ·2mo ago ·parent 15f6082

3 files changed +21880−8 diff truncated

README.md+14 page.json+9−8 sy8205fcc-etched.step+21857

README.md+14

@@ -38,6 +38,20 @@ SY8205FCC from Silergy Corp, in a SOIC-8-EP. Pinout and pin descriptions extract - Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm` - 3D model: SOIC-8-EP (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`sy8205fcc.step`](sy8205fcc.step) | 193 KB | You want the bare part, or you mark your own boards. |+| [`sy8205fcc-etched.step`](sy8205fcc-etched.step) | 1.9 MB | You want the part with `SY8205FCC` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 460 faces against 63 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance  Data extracted from the manufacturer datasheet, not a distributor listing:

page.json+9−8

@@ -4,7 +4,7 @@   "slug": "sy8205fcc",   "title": "SY8205FCC",   "brief": "Silergy Corp DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.2.0",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -34,7 +34,7 @@         "number": "1",         "name": "BS",         "type": "passive",-        "description": "Boot-Strap pin. Supply for the high-side gate driver. Decouple to LX with a 0.1 \u00b5F ceramic capacitor."+        "description": "Boot-Strap pin. Supply for the high-side gate driver. Decouple to LX with a 0.1 µF ceramic capacitor."       },       {         "number": "2",@@ -52,37 +52,37 @@         "number": "4",         "name": "SS",         "type": "passive",-        "description": "Soft-start programming pin. Connect a capacitor from this pin to GND to program soft-start time: Tss = Css \u00d7 0.6 V / 10 \u00b5A."+        "description": "Soft-start programming pin. Connect a capacitor from this pin to GND to program soft-start time: Tss = Css × 0.6 V / 10 µA."       },       {         "number": "5",         "name": "FB",         "type": "input",-        "description": "Output feedback pin. Connect to the center tap of an external divider to program Vout = 0.6 V \u00d7 (1 + R1/R2). Reference is 0.6 V typ."+        "description": "Output feedback pin. Connect to the center tap of an external divider to program Vout = 0.6 V × (1 + R1/R2). Reference is 0.6 V typ."       },       {         "number": "6",         "name": "VCC",         "type": "power_out",-        "description": "Internal 3.3 V LDO output. Powers internal analog and driving circuitry. Add a 1 \u00b5F bypass capacitor to GND."+        "description": "Internal 3.3 V LDO output. Powers internal analog and driving circuitry. Add a 1 µF bypass capacitor to GND."       },       {         "number": "7",         "name": "VIN",         "type": "power_in",-        "description": "Power supply input (PVIN, tied with pin 8). 4.5 V-30 V input range. Decouple to GND with at least a 10 \u00b5F ceramic capacitor."+        "description": "Power supply input (PVIN, tied with pin 8). 4.5 V-30 V input range. Decouple to GND with at least a 10 µF ceramic capacitor."       },       {         "number": "8",         "name": "VIN",         "type": "power_in",-        "description": "Power supply input (PVIN, tied with pin 7). 4.5 V-30 V input range. Decouple to GND with at least a 10 \u00b5F ceramic capacitor."+        "description": "Power supply input (PVIN, tied with pin 7). 4.5 V-30 V input range. Decouple to GND with at least a 10 µF ceramic capacitor."       },       {         "number": "9",         "name": "GND",         "type": "power_in",-        "description": "Exposed thermal paddle. Ground return. Solder to the PCB ground plane for electrical connection and thermal dissipation (\u03b8JC \u2248 10 \u00b0C/W).",+        "description": "Exposed thermal paddle. Ground return. Solder to the PCB ground plane for electrical connection and thermal dissipation (θJC ≈ 10 °C/W).",         "source": "renumbered-to-footprint-pad"       }     ],@@ -153,6 +153,7 @@     "sy8205fcc.kicad_mod",     "sy8205fcc.glb",     "sy8205fcc.step",+    "sy8205fcc-etched.step",     "sy8205fcc.lbr",     "docs/hero.png",     "docs/sy8205fcc-datasheet.pdf",

sy8205fcc-etched.stepadded+21857

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