component
SY7208CABC
Public Made by Adomby adom
Silergy Corp DC-DC Converters, TSOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 11d ago |
| viewers | 11d ago |
| package.json | 11d ago |
| page.json | 11d ago |
| README.md | 11d ago |
| sy7208cabc-etched.glb | 11d ago |
| sy7208cabc-etched.step | 11d ago |
| sy7208cabc-hero.glb | 11d ago |
| sy7208cabc-hero.overlay.json | 11d ago |
| sy7208cabc.glb | 11d ago |
| sy7208cabc.kicad_mod | 11d ago |
| sy7208cabc.kicad_sym | 11d ago |
| sy7208cabc.lbr | 11d ago |
| sy7208cabc.step | 11d ago |
SY7208CABC
Silergy Corp · DC-DC Converters · TSOT-23-6
SY7208CABC from Silergy Corp, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LX | output | Inductor node: connect an inductor between the IN pin and the LX pin; keep the PCB copper area associated with LX minimized to avoid noise problems. |
| 2 | GND | power_in | Ground pin; maximize the PCB copper area connected to GND for best thermal and noise performance. |
| 3 | FB | input | Feedback pin: connect resistor R1 between VOUT and FB and resistor R2 between FB and GND, with VOUT = 0.6V x (R1/R2 + 1); the datasheet recommends 10k to 1M for both resistors. |
| 4 | EN | input | Enable control: high turns on the part (EN rising threshold 2V, falling threshold 0.4V); do not leave it floated. |
| 5 | NC | unconnected | No connection. |
| 6 | IN | power_in | Input pin: decouple this pin to the GND pin with a 1uF ceramic capacitor; input voltage range is 3V to 25V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | TSOT-23-6 |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 3 | 25 | V | 3 | ||
| Feedback Reference Voltage | VREF | 0.588 | 0.6 | 0.612 | V | 3 | |
| Switching Frequency | Fsw | 0.8 | 1 | 1.2 | MHz | 3 | |
| Shutdown Current | ISHDN | 1 | 5 | µA | EN=0 | 3 | |
| EN Pin Input Current | IEN | 0 | 100 | nA | 3 | ||
| LX, IN, EN Absolute Maximum Voltage | 26 | V | 2 | ||||
| All Other Pins Absolute Maximum Voltage | 4 | V | 2 | ||||
| Power Dissipation SOT23-6 | PD | 0.6 | W | TA = 25°C | 2 | ||
| Junction Temperature Range (absolute maximum) | 125 | °C | 2 | ||||
| Lead Temperature (Soldering) | 260 | °C | Soldering, 10 sec. | 2 | |||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Input Voltage Supply (recommended) | 3 | 25 | V | 2 | |||
| Junction Temperature Range (recommended) | -40 | 125 | °C | 2 | |||
| Ambient Temperature Range (recommended) | -40 | 85 | °C | 2 | |||
| Quiescent Current | IQ | 100 | µA | VFB=0.66V | 3 | ||
| Low Side Main FET Rds(on) | RON | 150 | mΩ | 3 | |||
| Main FET Current Limit | ILIM1 | 600 | mA | 3 | |||
| IN UVLO Rising Threshold | VIN,UVLO | 2.3 | V | 3 | |||
| UVLO Hysteresis | VUVLO,HYS | 0.1 | V | 3 | |||
| Thermal Shutdown Temperature | TSD | 150 | °C | 3 | |||
| EN Rising Threshold | VENH | 2 | V | 3 | |||
| EN Falling Threshold | VENL | 0.4 | V | 3 | |||
| Package Thermal Resistance, Junction-to-Ambient | θJA | 161 | °C/W | 2 | |||
| Package Thermal Resistance, Junction-to-Case | θJC | 130 | °C/W | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | 3) The PCB copper area associated with LX pin must be | 7 |
CAD (KiCad official)
- Symbol:
SY7208CABC - Footprint:
Package_TO_SOT_SMD:TSOT-23-6 - 3D model: TSOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
sy7208cabc-etched.step/sy7208cabc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sy7208cabc.step/sy7208cabc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Silergy Corp datasheet (8 pp, sha256
d05f52f8e1d2b83a, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).