component
SY7011AABC
Public Made by Adomby adom
Silergy Corp DC-DC Converters, SOT23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| README.md | 16d ago |
| sy7011aabc-etched.glb | 16d ago |
| sy7011aabc-etched.step | 16d ago |
| sy7011aabc-hero.glb | 16d ago |
| sy7011aabc-hero.overlay.json | 16d ago |
| sy7011aabc.glb | 16d ago |
| sy7011aabc.kicad_mod | 16d ago |
| sy7011aabc.kicad_sym | 16d ago |
| sy7011aabc.lbr | 16d ago |
| sy7011aabc.step | 16d ago |
SY7011AABC
Silergy Corp · DC-DC Converters · SOT23-6
SY7011AABC from Silergy Corp, in a SOT23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LX | passive | Inductor node: connect an inductor between the IN pin and the LX pin, with LX rated -0.3V to 6.0V (transients to -3V and +7V are tested for under 20ns). |
| 2 | GND | power_in | Ground pin. |
| 3 | FB | input | Feedback pin: connect RFB1 between OUT and FB and RFB2 between FB and GND, with VOUT = 1.2V x (RFB1/RFB2 + 1) and a feedback reference of 1.182V to 1.218V. |
| 4 | EN | input | Enable pin: pull high to turn on and do not leave it floating, with a recommended range of 0V to VOUT+0.3V. |
| 5 | OUT | power_out | Output pin: decouple to GND with a minimum of 22µF ceramic capacitor, with a recommended operating range of 1.8V to 5.5V. |
| 6 | IN | power_in | Input pin with a recommended operating range of 0.85V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SOT23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 0.85 | 5.5 | V | 4 | ||
| Feedback Reference Voltage | VREF | 1.182 | 1.2 | 1.218 | mV | 4 | |
| EN Leakage Current | IEN,LK | -1 | 1 | µA | VEN=3.3V | 4 | |
| IN operating voltage | IN | 0.85 | 5.5 | V | 3 | ||
| OUT operating voltage | OUT | 1.8 | 5.5 | V | 3 | ||
| EN operating voltage | EN | 0 | V | Maximum printed as VOUT+0.3V (not a numeric limit) | 3 | ||
| All other pins operating voltage | 0 | 5.5 | V | 3 | |||
| Junction Temperature Range (operating) | TJ | -40 | 125 | °C | 3 | ||
| Ambient Temperature Range (operating) | TA | -40 | 85 | °C | 3 | ||
| FB, IN, OUT, EN absolute maximum voltage | -0.3 | 6 | V | 3 | |||
| LX absolute maximum voltage | -0.3 | 6 | V | 3 | |||
| LX voltage transient low | -3 | V | <20ns (footnote *1) | 3 | |||
| LX voltage transient high | 7 | V | <20ns (footnote *2) | 3 | |||
| Power Dissipation | PD | 1 | W | TA=25°C, SOT23-6 | 3 | ||
| Junction-to-ambient thermal resistance | θJA | 100 | °C/W | Note 2: natural convection, TA=25°C, two-layer Silergy evaluation board | 3 | ||
| Junction-to-case thermal resistance | θJC | 30 | °C/W | 3 | |||
| Junction Temperature Range (absolute maximum) | TJ | -40 | 150 | °C | 3 | ||
| Lead Temperature (soldering) | 260 | °C | 10 sec soldering | 3 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 |
CAD (KiCad official)
- Symbol:
SY7011AABC - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT23-6 (KiCad packages3D, STEP)
- 3D model files:
sy7011aabc-etched.step/sy7011aabc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sy7011aabc.step/sy7011aabc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Silergy Corp datasheet (6 pp, sha256
b303a4bd054b9657, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).