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SY6915RBC

Public Made by Adom

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Silergy Corp Battery Management ICs, VQFN-20-EP(3.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SY6915RBC

Silergy Corp · Battery Management ICs · VQFN-20-EP(3.5x3.5)

SY6915RBC from Silergy Corp, in a VQFN-20-EP(3.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ACN input Adapter current sense negative input.
2 ACP input Adapter current sense positive input.
3 ACCMS passive Common source connection for N-channel MOSFET switches.
4 ACDRV output N-channel blocking MOSFETs driver output.
5 ACPRES output AC adapter detection open-drain output, pulled high by an external pull-up when ACDET is above 1.8V and VCC is above UVLO, indicating a valid adapter is present to start charge.
6 ACDET input Adapter detection input set by a resistor divider from the adapter output; above 0.6V with VCC above UVLO, VDD is present and the ACPRES comparator and IMON are active.
7 IMON output Buffered input or charge current output selectable by SMBus command, with voltage equal to 20 times the differential voltage across the sense resistor.
8 SDA bidirectional SMBus data I/O, open-drain output requiring an external pull-up resistor per the SMBus specification.
9 SCL input SMBus clock input requiring an external pull-up resistor per the SMBus specification.
10 ILIM input Charge current limit input where the minimum of ILIM voltage and DAC limit voltage sets the limit; above 1.6V disables this control, charge is disabled below 75mV and enabled above 105mV.
11 BATDRV output Charge pump output to drive the N-channel BAT MOSFET.
12 ISN input Battery charge current sense negative input.
13 ISP input Battery charge current sense positive input.
14 GND power_in IC ground.
15 LDRV output Low side MOSFET driver output.
16 VDD power_out LDO output for the converter power MOSFET drivers; connect at least a 1µF ceramic capacitor to GND.
17 BST power_in High side power MOSFET driver power supply.
18 HDRV output High side MOSFET driver output.
19 LX passive Inductor connecting point.
20 VCC power_in IC power supply input; add a 10Ω resistor and a 1µF capacitor to filter inrush current and high frequency noise.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Silergy Corp
Package VQFN-20-EP(3.5x3.5)
Category Power Supply Chip
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Input Voltage Range VVCC_RNG 4.5 25 V 6
Charge Voltage Regulation Range VBAT_REG_RNG 1.024 19.2 V 6
Charge Voltage Accuracy 16.8V VBAT_REG_ACC 16.716 16.8 16.884 V ChargeVoltage() = 0x41A0 6
Charge Voltage Accuracy 12.592V VBAT_REG_ACC 12.529 12.592 12.655 V ChargeVoltage() = 0x3130 6
Charge Voltage Accuracy 8.4V VBAT_REG_ACC 8.35 8.4 8.45 V ChargeVoltage() = 0x20D0 6
Charge Voltage Accuracy 4.192V VBAT_REG_ACC 4.163 4.192 4.221 V ChargeVoltage() = 0x1060 6
Charge Current Regulation Range ICHG_REG_RNG 0 8128 mA VISP-ISN, 10mΩ sense resistor 6
Charge Current Accuracy 4096mA ICHG_REG_ACC 3973 4096 4219 mA ChargeCurrent() = 0x1000 6
Charge Current Accuracy 2048mA ICHG_REG_ACC 1946 2048 2150 mA ChargeCurrent() = 0x0800 6
Charge Current Accuracy 512mA ICHG_REG_ACC 430 512 594 mA ChargeCurrent() = 0x0200 6
Charge Current Accuracy 256mA ICHG_REG_ACC 204.8 256 307.2 mA ChargeCurrent() = 0x0100 6
Charge Current Accuracy 192mA ICHG_REG_ACC 147.8 192 236.2 mA ChargeCurrent() = 0x00C0 6
Charge Current Accuracy 128mA ICHG_REG_ACC 64 128 192 mA ChargeCurrent() = 0x0080 6
Input Current Limit Regulation Range IAC_REG_RNG 0 8064 mA VACP-ACN, 10mΩ sense resistor 6
Input Current Accuracy 4096mA IAC_REG_ACC 3973 4096 4219 mA InputCurrent() = 0x1000 7
Input Current Accuracy 2048mA IAC_REG_ACC 1946 2048 2150 mA InputCurrent() = 0x0800 7
Input Current Accuracy 1024mA IAC_REG_ACC 870 1024 1178 mA InputCurrent() = 0x0400 7
Input Current Accuracy 512mA IAC_REG_ACC 384 512 640 mA InputCurrent() = 0x0200 7
Current Sense Amplifier Output Voltage Range VIMON_RNG 0 3.3 V 7
Current Sense Amplifier Output Current Range IIMON_RNG 0 1 mA 7
Current Sense Amplifier Gain AIMON 20 V/V VIMON/(VISP-VISN) or (VACP-VACN) 7
CSA Gain Accuracy 40.96mV VIMON_ACC -2 2 % VACP-VACN or VISP-VISN=40.96mV 7
CSA Gain Accuracy 20.48mV VIMON_ACC -4 4 % VACP-VACN or VISP-VISN=20.48mV 7
CSA Gain Accuracy 10.24mV VIMON_ACC -15 15 % VACP-VACN or VISP-VISN=10.24mV 7
CSA Gain Accuracy 5.12mV VIMON_ACC -20 20 % VACP-VACN or VISP-VISN=5.12mV 7
CSA Gain Accuracy 2.56mV VIMON_ACC -33 33 % VACP-VACN or VISP-VISN=2.56mV 7
CSA Gain Accuracy 1.28mV VIMON_ACC -50 50 % VACP-VACN or VISP-VISN=1.28mV 7
Buffer Capacitance Load CIMON 0 100 pF 7
VCC UVLO Comparator VUVLO 3.5 3.75 4 V VVCC rising 7
VCC UVLO Hysteresis ΔVUVLO 340 mV VVCC falling 7
ACPRES Rising Threshold VACPRES 1.78 1.8 1.82 V VVCC >VUVLO, VACDET rising 7
ACPRES Falling Hysteresis VACPRES_HYS 35 50 75 mV VVCC >VUVLO, VACDET falling 7
ACPRES Rising Deglitch Time (first time) tACPRES_DEG 110 160 210 ms VVCC >VUVLO, VACDET rising above 2.4V, First time or ChargeOption() bit [15]=0 7
ACPRES Rising Deglitch Time (not first time) tACPRES_DEG 0.9 1.3 1.7 s VVCC >VUVLO,VACDET rising above 2.4V, Not first time and ChargeOption() bit [15]=1 7
ACPRES Rising Deglitch Time (air mode) tACPRES_DEG 0.6 1 1.7 s VVCC >VUVLO,VACDET rising above 1.8V and less than 2.4V, air mode 7
WAKEUP Detect Rising VWAKE_RISE 0.6 0.8 V VVCC> VUVLO, VACDET rising 7
ACDRV Driver Sink Current IACDRV_SINK 1.75 mA 10
BATDRV Driver Voltage VBATPUMP 6 V VBATDRV-VISN when VVCC>6V 10
BATDRV Driver Source Current IBATDRV_SOURCE 40 60 µA 10
BATDRV Driver Sink Current IBATDRV_SINK 1 mA 10
PWM Switching Frequency FSW 600 750 900 kHz ChargeOption() bit [9] = 0 (Default) 10
PWM Increase Frequency FSW+ 665 885 1100 kHz ChargeOption() bit [10:9] = 11 10
PWM Decrease Frequency FSW- 465 615 765 kHz ChargeOption() bit [10:9] = 01 10
SCL/SDA Input Low Threshold VIN_LO 0.8 V 10
SCL/SDA Input High Threshold VIN_HI 2.1 V 10
SDA/ACPRES Output Saturation Voltage VOUT_LO 0.5 V 5mA drain current 10
SDA/ACPRES Leakage Current IOUT_LEAK -1 1 µA V=7V 10
Soft Start Current Step ISTEP 64 mA 10mΩ current sensing resistor 10
Soft Start Current Step Time tSTEP 240 µs 10
Battery Current when BATFET OFF IBAT_BATFET_OFF 5 µA VISN=16.8V, VCC disconnect from battery, BATFET charge pump off, BATFET turns off 10
Battery Current when BATFET ON IBAT_BATFET_ON 25 µA VISN =16.8V, VCC connect from battery, BATFET charge pump on, BATFET turns on 10
Standby Quiescent Current ISTANDBY 0.65 0.8 mA Adapter present, VVCC>VUVLO, VACDET>0.6V, charge disabled 10
Adapter Current when No Switching IAC_NOSW 1.5 3 mA Adapter present, VVCC>VUVLO, 2.4V<VACDET<3.15V, charge enabled, no switching 10
Adapter Current when Switching IAC_SW 10 mA Adapter present, VVCC>VUVLO, 2.4V<VACDET<3.15V, charge enabled, switching, MOSFET SiS412DN 10
Abs Max ACN, ACP, ACCMS, ACPRES, ISN, ISP, LX, VCC -0.3 30 V 5
Abs Max ACDRV, BATDRV, BST, HDRV -0.3 36 V 5
Abs Max ACDET, IMON, SDA, SCL, ILIM, LDRV, VDD -0.3 6 V 5
Abs Max ACP-ACN, ISP-ISN -0.3 0.3 V 5
Abs Max ACDRV-ACCMS, BATDRV-ISN, BST-LX, BST-HDRV, HDRV-LX, VDD-LDRV -0.3 6 V 5
Junction Temperature Range (abs max) TJ -40 150 °C 5
Storage Temperature TSTG -65 150 °C 5
Lead Temperature 300 °C Soldering, 10s 5
Thermal Resistance Junction-Ambient θJA 46.8 °C/W QFN3.5×3.5-20 5
Thermal Resistance Junction-Case θJC 56.9 °C/W QFN3.5×3.5-20 5
Operating Temperature Range -40 100 °C 5
Rec ACN, ACP, ACCMS, ACPRES, ISN, ISP, LX, VCC -0.3 25 V 5
Rec ACDRV, BATDRV, BST, HDRV -0.3 30 V 5
Rec ACDET, IMON, SDA, SCL, ILIM, LDRV, VDD -0.3 5.5 V 5
Rec ACP-ACN, ISP-ISN -0.2 0.2 V 5
Rec Junction Temperature Range TJ -40 125 °C 5
Rec Ambient Temperature Range TA -40 85 °C 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper MOSFET’s output terminal as close as possible. Minimize the copper area of this trace to lower 25

CAD (KiCad official)

  • Symbol: SY6915RBC
  • Footprint: Package_DFN_QFN:QFN-20-1EP_3.5x3.5mm_P0.5mm_EP2x2mm
  • 3D model: VQFN-20-EP(3.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: sy6915rbc-etched.step / sy6915rbc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sy6915rbc.step / sy6915rbc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Silergy Corp datasheet (29 pp, sha256 9d6ab7bf6c2247ee, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF