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SY6875ADBC

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Silergy Corp Power Distribution Switches, DFN-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SY6875ADBC

Silergy Corp · Power Distribution Switches · DFN-10-EP(3x3)

SY6875ADBC from Silergy Corp, in a DFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Power input pin, decoupled with at least 0.1uF MLCC to ground; input voltage range is 2.5V to 15V (recommended operating), with surge up to 30V and a 30V absolute maximum supply input.
2 IN power_in Power input pin, decoupled with at least 0.1uF MLCC to ground; input voltage range is 2.5V to 15V (recommended operating), with surge up to 30V and a 30V absolute maximum supply input.
3 IN power_in Power input pin, decoupled with at least 0.1uF MLCC to ground; input voltage range is 2.5V to 15V (recommended operating), with surge up to 30V and a 30V absolute maximum supply input.
4 VCP input Output clamp voltage selection pin: tie high through a resistor to IN for 5V mode (clamp 5.4V to 6.0V), tie low through a resistor to ground for 3.3V mode (clamp 3.6V to 4.0V), or float for 12V mode (clamp 12.6V to 14.0V), and decouple with 0.1uF; absolute maximum rating is 30V.
5 ILIM passive Current limit program pin, set by a resistor to ground per the datasheet table (11 kΩ gives 1.0 A up to 2.2 kΩ giving 5.0 A), with a current limit program range of 1 A to 5 A.
6 SST passive Soft-start time program pin, set by a capacitor to ground (105 nF gives 29.4 ms soft-start time, and with no external capacitor the internal default is about 1.4 ms).
7 EN input Enable interface pin, pulled high to enable the IC, with an EN turn-on threshold of 2 V and turn-off threshold of 0.4 V; absolute maximum rating is 30V.
8 OUT power_out Power output pin from the integrated protection N-channel FET (RDS(ON) 40 mΩ, 70 mΩ max), with output voltage clamped to the VCP-selected threshold.
9 OUT power_out Power output pin from the integrated protection N-channel FET (RDS(ON) 40 mΩ, 70 mΩ max), with output voltage clamped to the VCP-selected threshold.
10 OUT power_out Power output pin from the integrated protection N-channel FET (RDS(ON) 40 mΩ, 70 mΩ max), with output voltage clamped to the VCP-selected threshold.
11 GND power_in Ground pin, implemented as the exposed thermal paddle on the package bottom.

Key specifications

Parameter Value
Manufacturer Silergy Corp
Package DFN-10-EP(3x3)
Category Power Management (PMIC)
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range VIN 2.5 30 V 3
Supply Input Voltage 2.5 15 V 3
Supply Input Voltage 30 V 3
EN pin, VCP pin 30 V 3
Input UVLO Threshold, VCP=LOW VUVLO 2.2 2.4 V VCP=LOW 3
Input UVLO Threshold, VCP=HIGH VUVLO 3.4 3.8 V VCP=HIGH 3
Input UVLO Threshold, VCP=OPEN VUVLO 8.1 9 V VCP=OPEN 3
UVLO hysteresis, VCP=LOW VHYS 0.05 0.085 0.13 V VCP=LOW 3
UVLO hysteresis, VCP=HIGH VHYS 0.06 0.095 0.15 V VCP=HIGH 3
UVLO hysteresis, VCP=OPEN VHYS 0.1 0.19 0.29 V VCP=OPEN 3
Bias Current IBIAS 200 µA 3
Shutdown Current ISHDN 10 µA EN=0 3
Protection FET RON RDS(ON) 40 70 mΩ 3
Current Limit Accuracy -30 30 % Printed as ±30% ILIM 3
Current Limit Program Range ILIM 1 5 A Note 5 3
Clamping Output Voltage, VCP=LOW VCLP 3.6 3.8 4 V VCP=LOW 3
Clamping Output Voltage, VCP=HIGH VCLP 5.4 5.7 6 V VCP=HIGH 3
Clamping Output Voltage, VCP=OPEN VCLP 12.6 13.3 14 V VCP=OPEN 3
Soft-start Time TSST 29.4 ms CSST=105nF (Note 4) 3
Soft-start Time Accuracy -30 30 % Printed as ±30% TSST 3
EN Turn-on Threshold VEN_ON 2 V 3
EN Turn-off Threshold VEN_OFF 0.4 V 3
Output Discharge Resistor RDIS 30 Ω EN=0 3
Thermal Shutdown Temperature TSD 140 °C 3
Thermal Shutdown Hysteresis THYS 20 °C 3
Junction Temperature Range -40 125 °C 3
Ambient Temperature Range -40 85 °C 3
Junction Temperature Range 125 °C 3
Storage Temperature Range -65 150 °C 3
Lead Temperature (Soldering, 10 sec.) 260 °C 10 sec. soldering 3
Power Dissipation, DFN3X3-10 PD 2.6 W TA = 25°C 3
Package Thermal Resistance, junction-to-ambient θJA 38 °C/W Note 2: natural convection, TA = 25°C, JEDEC 51-3 board 3
Package Thermal Resistance, junction-to-case θJC 8 °C/W 3

CAD (KiCad official)

  • Symbol: SY6875ADBC
  • Footprint: Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
  • 3D model: DFN-10-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: sy6875adbc-etched.step / sy6875adbc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sy6875adbc.step / sy6875adbc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Silergy Corp datasheet (9 pp, sha256 3c76b720e03b7d02, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF