# SY6345AAC

**Silergy Corp** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

SY6345AAC from Silergy Corp, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | IC power supply input, specified from 4V to 40V, and should be bypassed to the GND pin with a capacitor (about 2.2uF X5R or better ceramic recommended, located close to the device). |
| 2 | GND | power_in | Ground pin, to be connected to the external circuit ground in a single-point ground layout with the input and output capacitors. |
| 3 | EN | input | Enable pin: pull low to shut down and pull high to enable; it must not be left floating, with logic-high at 1.5V minimum and logic-low at 0.4V maximum for VIN = 5V to 40V. |
| 4 | ADJ | input | Output voltage adjust (feedback) pin, fed from the output through a resistor divider so that Vo = 0.6 x (1 + R1/R2), with the 0.6V reference typically 588 to 612 mV. |
| 5 | OUT | power_out | Regulated output pin, rated for up to 300mA load current, to be bypassed to GND with a low ESR ceramic capacitor (2.2uF can be used per the application information). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN to GND |  | -0.3 |  | 40 | V |  | 3 |
| OUT, EN, ADJ to GND |  | -0.3 |  |  | V |  | 3 |
| Power Dissipation SOT23-5 | PD |  |  | 0.6 | W | TA = 25°C, SOT23-5 | 3 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 3 |
| Junction Temperature (absolute maximum) | TJ |  |  | 150 | °C |  | 3 |
| Lead Temperature (Soldering) |  |  |  | 260 | °C | Soldering, 10sec. | 3 |
| Supply Input Voltage |  | 4 |  | 40 | V |  | 3 |
| Junction Temperature (operating) | TJ | -40 |  | 125 | °C |  | 3 |
| Ambient Temperature Range |  | -40 |  | 85 | °C |  | 3 |
| Input Voltage | VIN | 4 |  | 40 | V | IOUT=10mA | 4 |
| Reference Voltage | VREF | 588 | 600 | 612 | mV | VIN=12V, Io=10mA | 4 |
| Load Regulation | ∆VLDR |  | 0.25 | 1 | % | IO=10mA to 300mA | 4 |
| Quiescent Current | IQ |  | 7 | 10 | µA | No Load | 4 |
| Output Current | IO | 0 |  | 300 | mA | VIN=VOUT+0.6V | 4 |
| Output Current limit | ILIM | 350 |  | 750 | mA | VIN= 6V,VOUT=0.9xVOUT(normal) | 4 |
| Package Thermal Resistance junction-to-ambient | θJA |  | 170 |  | °C/W |  | 3 |
| Package Thermal Resistance junction-to-case | θJC |  | 130 |  | °C/W |  | 3 |

## CAD (KiCad official)

- Symbol: `SY6345AAC`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `sy6345aac-etched.step` / `sy6345aac-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sy6345aac.step` / `sy6345aac.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Silergy Corp datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586199843311636480) (10 pp, sha256 `a573f9a22cd9b626`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sy6345aac-datasheet.pdf)