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docs sy6280aac: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sy6280aac: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md sy6280aac: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sy6280aac-etched.fit.json sy6280aac: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sy6280aac-etched.glb sy6280aac: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sy6280aac-etched.step sy6280aac: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sy6280aac.glb Publish 0.1.0 · Ray
sy6280aac.kicad_mod Publish 0.1.0 · Ray
sy6280aac.kicad_sym Publish 0.1.0 · Ray
sy6280aac.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sy6280aac.step Publish 0.1.0 · Ray

SY6280AAC

Silergy Corp · AC-DC Controllers and Regulators · SOT-23-5

SY6280AAC from Silergy Corp, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Switched output pin. Drain of the internal P-channel MOSFET; delivers current from IN when EN is high. Includes ~150Ω discharge resistance to GND at shutdown. Reverse-blocking (no body diode) so OUT can be forced above IN while disabled.
2 GND power_in Ground reference for the device. Also serves as the case position for θJC thermal measurement.
3 ISET input Current-limit programming pin. Connect a resistor RSET from ISET to GND to program the switch current limit: Ilim (A) = 6800 / RSET (Ω). Valid range is 0.4A to 2A.
4 EN input Active-high ON/OFF control input. Pull high (VEN(H) ≥ 2V) to enable the switch; pull low (VEN(L) ≤ 0.8V) to disable. Must not be left floating. Leakage ≤ 1µA at VEN = 5.5V.
5 IN power_in Power input pin, 2.4V to 5.5V. Source of the internal P-channel MOSFET. A 10µF ceramic bypass capacitor to GND is strongly recommended to suppress hot-plug voltage droop and input ringing during output short events. UVLO threshold ~2.3V with 0.1V hysteresis.

Key specifications

Parameter Value
Manufacturer Silergy Corp
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • SY6280AAC

CAD (KiCad official)

  • Symbol: SY6280AAC
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: sy6280aac-etched.step / sy6280aac-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sy6280aac.step / sy6280aac.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sy6280aac.step 85 KB You want the bare part, or you mark your own boards.
sy6280aac-etched.step 2.0 MB You want the part with SY6280AAC already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 469 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Silergy Corp datasheet (6 pp, sha256 64b2019999864afd, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF