component
SY59112A2FCP
Public Made by Adomby adom
Silergy Corp LED Drivers, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSY59112A2FCP
Silergy Corp · LED Drivers · SOP-8-EP
SY59112A2FCP from Silergy Corp, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LX2 | passive | Drain of the bleeding MOS pin; absolute maximum rating is -0.3 V to 700 V. |
| 2 | HVCC | power_in | HV power supply pin; absolute maximum rating is -0.3 V to 700 V. |
| 3 | LX1 | passive | Drain of the main MOS pin; absolute maximum rating is -0.3 V to 500 V. |
| 4 | GATE | output | Gate of the integrated current ripple remover MOSFET; absolute maximum rating is -0.3 V to 500 V to ground, and GATE to LX1 is limited to -0.3 V to 3.6 V. |
| 5 | LEDN | passive | Connects to the cathode of the LED load; absolute maximum rating is -0.3 V to 500 V, and LEDN to LX1 is limited to -0.3 V to 20 V. |
| 6 | ISEN1 | input | Main MOS current sense pin that sets the output current through its sense network; absolute maximum rating is -0.3 V to 3.6 V. |
| 7 | ISEN2 | input | BLD MOS current sense pin used to adjust the latching current via R_ISEN2, with a recommended value of R_ISEN2 > 0.75 ohm; absolute maximum rating is -0.3 V to 3.6 V. |
| 8 | VCC | power_in | Power supply pin; absolute maximum rating is -0.3 V to 25 V. |
| 9 | GND | power_in | Ground pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SOP-8-EP |
| Category | LED Drivers |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| LX2, HVCC voltage (absolute maximum) | -0.3 | 700 | V | 3 | |||
| LX1, GATE, LEDN voltage (absolute maximum) | -0.3 | 500 | V | 3 | |||
| ISEN1, ISEN2 voltage (absolute maximum) | -0.3 | 3.6 | V | 3 | |||
| VCC voltage (absolute maximum) | -0.3 | 25 | V | 3 | |||
| LEDN to LX1 voltage (absolute maximum) | -0.3 | 20 | V | 3 | |||
| GATE to LX1 voltage (absolute maximum) | -0.3 | 3.6 | V | 3 | |||
| Power dissipation SO8E | 3.3 | W | TA = 25°C | 3 | |||
| Junction temperature range (absolute maximum) | -40 | 150 | °C | 3 | |||
| Lead temperature (soldering) | 260 | °C | Soldering, 10 sec. | 3 | |||
| Storage temperature range | -65 | 150 | °C | 3 | |||
| Junction temperature range (recommended) | -40 | 150 | °C | 3 | |||
| Ambient temperature range (recommended) | -40 | 120 | °C | 3 | |||
| Package thermal resistance junction-to-ambient SO8E | θJA | 30 | °C/W | 3 | |||
| Package thermal resistance junction-to-case SO8E | θJC | 10 | °C/W | 3 | |||
| VIN turn-on threshold | VVIN_ON | 12 | V | VIN = 15V (Note 3), TA = 25°C unless otherwise specified | 4 | ||
| VIN turn-off threshold | VVIN_OFF | 8.8 | V | VIN = 15V (Note 3), TA = 25°C unless otherwise specified | 4 | ||
| Quiescent current | IQ | 350 | µA | VIN = 15V (Note 3), TA = 25°C unless otherwise specified | 4 | ||
| Internal reference voltage | VREF | 0.3 | V | VIN = 15V (Note 3), TA = 25°C unless otherwise specified | 4 | ||
| BV of LX1 MOS | VBV_LX1 | 500 | V | VIN = 15V (Note 3), TA = 25°C unless otherwise specified | 4 | ||
| BV of LX2 MOS | VBV_LX2 | 700 | V | VIN = 15V (Note 3), TA = 25°C unless otherwise specified | 4 | ||
| Zener voltage between LEDN and GATE of SY59112A2 | VZener | 11.5 | V | VIN = 15V (Note 3), TA = 25°C unless otherwise specified | 4 | ||
| Thermal foldback temperature | TFB | 155 | °C | VIN = 15V (Note 3), TA = 25°C unless otherwise specified | 4 |
CAD (KiCad official)
- Symbol:
SY59112A2FCP - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
sy59112a2fcp-etched.step/sy59112a2fcp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sy59112a2fcp.step/sy59112a2fcp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Silergy Corp datasheet (5 pp, sha256
9086c48eeb920c0d, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).