component
SY58874UFAC
Public Made by Adomby adom
Silergy Corp AC-DC Controllers And Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SY58874UFAC
Silergy Corp · AC-DC Controllers And Regulators · SOP-8
SY58874UFAC from Silergy Corp, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | passive | Peak current limit set pin; the datasheet gives the CS limit as VCS_LIMIT 530 mV, and the internal GM error amplifier output is pinned out to this pin. |
| 2 | FB | input | Voltage feedback pin, connected to a resistor divider to sense the output voltage; the absolute maximum rating is -0.3V to 16V and the internal reference is 1.225 V. |
| 3 | GND | power_in | Ground pin. |
| 4 | VCC | power_in | Power supply pin; the datasheet gives the absolute maximum rating as -0.3V to 20V, the turn-on threshold as 14 V and the turn-off threshold as 7.45 V. |
| 5 | LX | passive | Internal high-voltage MOSFET drain pin, rated 520 V (BV of HV MOSFET). |
| 6 | LX | passive | Internal high-voltage MOSFET drain pin, rated 520 V (BV of HV MOSFET). |
| 7 | LX | passive | Internal high-voltage MOSFET drain pin, rated 520 V (BV of HV MOSFET). |
| 8 | LX | passive | Internal high-voltage MOSFET drain pin, rated 520 V (BV of HV MOSFET). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| CS pin voltage | -0.3 | 3.6 | V | 3 | |||
| FB pin voltage | -0.3 | 16 | V | 3 | |||
| VCC pin voltage | -0.3 | 20 | V | 3 | |||
| LX pin voltage (HV MOSFET drain) | 520 | V | 3 | ||||
| Power Dissipation SO8 | 1.1 | W | TA = 25°C | 3 | |||
| Lead Temperature (Soldering) | 260 | °C | Soldering, 10 sec. | 3 | |||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| VCC Turn-on Threshold | VVCC_ON | 14 | V | 4 | |||
| VCC Turn-off Threshold | VVCC_OFF | 7.45 | V | 4 | |||
| VCC Shunt Voltage | VVCC_SHUNT | 14.8 | V | VVCC>2mA | 4 | ||
| Start up Current | IST | 53 | µA | VVCC=12V | 4 | ||
| Quiescent Current | IQ | 270 | µA | 4 | |||
| CS Limit | VCS_LIMIT | 530 | mV | 4 | |||
| Reference Voltage for Feedback | VREF | 1.225 | V | 4 | |||
| Internal OVP Voltage Threshold | VREF_OVP | 1.4 | V | 4 | |||
| Min ON Time | TON_MIN | 700 | ns | 4 | |||
| Max ON Time | TON_MAX | 20 | µs | 4 | |||
| Min OFF Time | TOFF_MIN | 1.7 | µs | 4 | |||
| Max OFF Time | TOFF_MAX | 50 | µs | 4 | |||
| BV of HV MOSFET | VBV | 520 | V | 4 | |||
| Rdson of HV MOSFET | RDSON | 3.4 | Ω | 4 | |||
| Thermal Shut Down Temperature | TSD | 160 | ºC | 4 | |||
| Package thermal resistance junction-to-ambient | θJA | 88 | °C/W | Natural convection, TA=25°C, JEDEC 51-3 low-K board (Note 2) | 3 | ||
| Package thermal resistance junction-to-case | θJC | 45 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
SY58874UFAC - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
sy58874ufac-etched.step/sy58874ufac-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sy58874ufac.step/sy58874ufac.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Silergy Corp datasheet (8 pp, sha256
753b3ff1d4af7eaf, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SY58874UFAC
**Silergy Corp** · AC-DC Controllers And Regulators · SOP-8
SY58874UFAC from Silergy Corp, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | passive | Peak current limit set pin; the datasheet gives the CS limit as VCS_LIMIT 530 mV, and the internal GM error amplifier output is pinned out to this pin. |
| 2 | FB | input | Voltage feedback pin, connected to a resistor divider to sense the output voltage; the absolute maximum rating is -0.3V to 16V and the internal reference is 1.225 V. |
| 3 | GND | power_in | Ground pin. |
| 4 | VCC | power_in | Power supply pin; the datasheet gives the absolute maximum rating as -0.3V to 20V, the turn-on threshold as 14 V and the turn-off threshold as 7.45 V. |
| 5 | LX | passive | Internal high-voltage MOSFET drain pin, rated 520 V (BV of HV MOSFET). |
| 6 | LX | passive | Internal high-voltage MOSFET drain pin, rated 520 V (BV of HV MOSFET). |
| 7 | LX | passive | Internal high-voltage MOSFET drain pin, rated 520 V (BV of HV MOSFET). |
| 8 | LX | passive | Internal high-voltage MOSFET drain pin, rated 520 V (BV of HV MOSFET). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| CS pin voltage | | -0.3 | | 3.6 | V | | 3 |
| FB pin voltage | | -0.3 | | 16 | V | | 3 |
| VCC pin voltage | | -0.3 | | 20 | V | | 3 |
| LX pin voltage (HV MOSFET drain) | | | | 520 | V | | 3 |
| Power Dissipation SO8 | | | | 1.1 | W | TA = 25°C | 3 |
| Lead Temperature (Soldering) | | | | 260 | °C | Soldering, 10 sec. | 3 |
| Storage Temperature Range | | -65 | | 150 | °C | | 3 |
| VCC Turn-on Threshold | VVCC_ON | | 14 | | V | | 4 |
| VCC Turn-off Threshold | VVCC_OFF | | 7.45 | | V | | 4 |
| VCC Shunt Voltage | VVCC_SHUNT | | 14.8 | | V | VVCC>2mA | 4 |
| Start up Current | IST | | 53 | | µA | VVCC=12V | 4 |
| Quiescent Current | IQ | | 270 | | µA | | 4 |
| CS Limit | VCS_LIMIT | | 530 | | mV | | 4 |
| Reference Voltage for Feedback | VREF | | 1.225 | | V | | 4 |
| Internal OVP Voltage Threshold | VREF_OVP | | 1.4 | | V | | 4 |
| Min ON Time | TON_MIN | | 700 | | ns | | 4 |
| Max ON Time | TON_MAX | | 20 | | µs | | 4 |
| Min OFF Time | TOFF_MIN | | 1.7 | | µs | | 4 |
| Max OFF Time | TOFF_MAX | | 50 | | µs | | 4 |
| BV of HV MOSFET | VBV | | 520 | | V | | 4 |
| Rdson of HV MOSFET | RDSON | | 3.4 | | Ω | | 4 |
| Thermal Shut Down Temperature | TSD | | 160 | | ºC | | 4 |
| Package thermal resistance junction-to-ambient | θJA | | 88 | | °C/W | Natural convection, TA=25°C, JEDEC 51-3 low-K board (Note 2) | 3 |
| Package thermal resistance junction-to-case | θJC | | 45 | | °C/W | | 3 |
## CAD (KiCad official)
- Symbol: `SY58874UFAC`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `sy58874ufac-etched.step` / `sy58874ufac-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sy58874ufac.step` / `sy58874ufac.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Silergy Corp datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590922735730446336) (8 pp, sha256 `753b3ff1d4af7eaf`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sy58874ufac-datasheet.pdf)