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SY5231ABC

Public Made by Adom

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Silergy Corp AC-DC Controllers And Regulators, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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SY5231ABC

Silergy Corp · AC-DC Controllers And Regulators · SOT-23-6

SY5231ABC from Silergy Corp, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Power supply pin: connect it to the converter output when the SR MOSFET is on the low side, or to GND when the SR MOSFET is on the high side.
2 GND power_in Connect this pin to the SR MOSFET source terminal.
3 REG passive Connect a resistor between this pin and GND to set the falling slope reference time threshold (TREF).
4 VDD power_out Output of the internal LDO that powers the control unit and GATE drive circuit; connect a 0.1µF or larger ceramic capacitor between VDD and GND.
5 GATE output Connect this pin to the GATE terminal of the SR MOSFET.
6 DSEN input Connect this pin to the SR MOSFET drain to sense drain voltage; it is also used as a self-supply channel.

Key specifications

Parameter Value
Manufacturer Silergy Corp
Package SOT-23-6
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN pin voltage -0.3 28 V 3
REG pin voltage -0.3 16 V 3
VDD pin voltage -0.3 16 V 3
GATE pin voltage -0.3 16 V 3
DSEN pin voltage -1.5 200 V 3
VDD pin current IVDD 20 mA 3
Power dissipation 0.6 W TA = 25°C, SOT23-6 3
Junction temperature range -45 150 °C 3
Storage temperature range -65 150 °C 3
Lead temperature (soldering) 260 °C 10 sec. soldering 3
VIN operating voltage 3.3 21 V 3
DSEN operating voltage -1 150 V 3
Junction temperature operating range -40 125 °C 3
Ambient temperature operating range -40 105 °C 3
Threshold of switching to VIN supply channel VVIN_VINSPY 4.7 4.85 5 V VVIN is rising 4
Threshold of switching to DSEN supply channel VVIN_DSENSPY 4.6 4.75 4.9 V VVIN is falling 4
VDD ON threshold VVDD_ON 5 5.26 5.52 V 4
UVLO hysteresis VVDD_HYS 2.35 2.5 2.75 V 4
VDD regulation voltage when VIN pin is active to supply IC VVDD_REG_VIN 8.65 9.1 9.55 V 4
VDD regulation voltage when DSEN pin is active to supply IC VVDD_REG_DSEN 4.75 5.1 5.35 V 4
Operating current IVDD_OP 3 3.5 mA VVDD=9V,CGATE=2.2nF, FSW=100kHz 4
Maximum VDD pin capacitor charging current (VIN pin active) IVDD_CHARGE_MAX 12 17 mA VIN pin is active to charge VDD capacitor 4
Maximum VDD pin capacitor charging current (DSEN pin active) IVDD_CHARGE_MAX 40 50 mA DSEN pin is active to charge VDD capacitor 4
Quiescent current IVDD_STBY 195 240 µA Under standby mode 4
PVS initial enable threshold VPVS_INITIAL_EN 120 150 180 mV 4
Blanking time for sample PVS pin voltage TPVS_BLK 210 310 410 ns 4
Low level threshold to sense VDSEN falling time VDSEN_LTH 0 20 40 mV VDSEN is falling 4
DSEN threshold to force turn off VDESN_OFF_TH 5 15 25 mV 4
Closed loop VDSEN regulation voltage level VDS_REG -54 -33 -22 mV SR MOSFET is conducting 4
SR MOSFET turn off threshold VOFF_TH -10 0 10 mV VDSEN is rising 4
Time threshold IC go into sleep TSTANDBY 16 20 24 us 4
Resistor to program frequency option RREG 75 100 125 ns RREG=50k 4
Resistor to program frequency option RREG 225 300 375 ns RREG=300k 4
Gate pin clamped current before UVLO ON ICLP 160 200 240 mA Vgs=1V 4
Max. source current ISOURCE_MAX 0.375 0.5 A VVDD=9V, CLOAD=2.2nF, Vgs from 1V to 8V 4
Max. sink current ISINK_MAX 1.5 2 A VVDD=9V, CLOAD=2.2nF, Vgs from 8V to 1V 5
Minimum ON time TON_MIN 550 750 1050 ns 5
Minimum OFF time TOFF_MIN 300 450 600 ns 5
Turn on delay TDELAY_ON 30 50 ns CGATE=2.2nF 5
Turn off delay TDELAY_OFF 10 20 ns CGATE=2.2nF 5
Thermal shutdown temperature TSD 150 160 170 °C 5
Hysteresis to resume operating TOTP_HYS 15 20 25 °C 5
Package thermal resistance, junction to ambient θJA 170 °C/W SOT23-6 (Note 2) 3
Package thermal resistance, junction to case θJC 130 °C/W SOT23-6 3

CAD (KiCad official)

  • Symbol: SY5231ABC
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: sy5231abc-etched.step / sy5231abc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sy5231abc.step / sy5231abc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Silergy Corp datasheet (12 pp, sha256 7c092821f4e6ba58, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF