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SY100ELT23LZG-TR

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Microchip Tech Translators / Level Shifters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssy100elt23lzg-trfactory-2.0.0extractor-text

Verified SY100ELT23LZG-TR

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SY100ELT23LZG-TR · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 12-page datasheet
  • ✓distributor: lcsc C632323, digikey 576-1362-2-ND, mouser 998-SY100ELT23LZGTR
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-fcxl0uau/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sy100elt23lzg-tr.kicad_sym✓ sy100elt23lzg-tr.kicad_mod✓ sy100elt23lzg-tr.step
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Ray Publish 0.1.0 295b7b7 17h ago

SY100ELT23LZG-TR

Microchip Tech · Translators / Level Shifters · SOIC-8

SY100ELT23LZG-TR from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D0 input Non-inverting differential LVPECL input for channel 0, with input swing of 200 mV to 1000 mV and common mode range 1.5 V to VCC.
2 /D0 input Inverting differential LVPECL input for channel 0, with input swing of 200 mV to 1000 mV and common mode range 1.5 V to VCC.
3 /D1 input Inverting differential LVPECL input for channel 1, with input swing of 200 mV to 1000 mV and common mode range 1.5 V to VCC.
4 D1 input Non-inverting differential LVPECL input for channel 1, with input swing of 200 mV to 1000 mV and common mode range 1.5 V to VCC.
5 GND power_in Ground.
6 Q1 output LVTTL output for channel 1 with VOL max 0.5 V at IOL = 24 mA and VOH min 2.0 V at IOH = -3.0 mA.
7 Q0 output LVTTL output for channel 0 with VOL max 0.5 V at IOL = 24 mA and VOH min 2.0 V at IOH = -3.0 mA.
8 VCC power_in +3.3V supply (3.3 V ±5%), absolute maximum -0.5 V to +3.8 V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Logic ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power Supply Voltage VCC -0.5 3.8 V 2
PECL Input Voltage VIN 0 V 0V to VCC+0.5V 2
Voltage Applied to Output at High State VOUT -0.5 V -0.5V to VCC 2
Power Supply Current ICC 30 mA VCC = +3.3V ±5% 2
Output High Voltage VOH 2 V IOH = -3.0 mA 2
Output Low Voltage VOL 0.5 V IOL = 24 mA 2
Output Short Circuit Current IOS -240 -80 mA VOUT = 0V 2
Input High Current IIH 150 μA 2
Input Low Current IIL 0.5 μA 2
Common Mode Range VCMR 1.5 V max is VCC 2
Input High Voltage VIH 2135 2420 mV Note 1: VCC = 3.3V 2
Input Low Voltage VIL 1490 1825 mV Note 1: VCC = 3.3V 2
Maximum Input Frequency fMAX 160 MHz CL = 20 pF, Note 1, Note 2 3
Propagation Delay tPD 1.5 2 2.5 ns CL = 20 pF 3
Part-to-Part Skew tSKPP 0.5 ns CL = 20 pF, Note 3, Note 6 3
Within-Device Skew (HIGH-to-HIGH) tSKEW++ 0.3 ns Note 4, Note 6 3
Input Swing VPP 200 1000 mV Note 7 3
Output Rise/Fall Time (1.0V to 2.0V) tr/tf 0.5 1 ns CL = 20 pF 3
Lead Temperature 260 °C Soldering, 20 sec. 3
Ambient Operating Temperature TA -40 85 °C 3
Storage Temperature TS -65 150 °C 3

CAD (KiCad official)

  • Symbol: SY100ELT23LZG-TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: sy100elt23lzg-tr-etched.step / sy100elt23lzg-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sy100elt23lzg-tr.step / sy100elt23lzg-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (12 pp, sha256 07adf0966fba4256, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF