# SY100ELT22ZG

**Microchip Tech** · Translators / Level Shifters · SOIC-8

SY100ELT22ZG from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q0 | output | Differential PECL Output 0, the true side of the Q0/̅Q0 pair, which the datasheet rates for a continuous output current of 50 mA. |
| 2 | /Q0 | output | Differential PECL Output 0, the complementary side of the Q0/̅Q0 pair, which the datasheet rates for a continuous output current of 50 mA. |
| 3 | Q1 | output | Differential PECL Output 1, the true side of the Q1/̅Q1 pair, which the datasheet rates for a continuous output current of 50 mA. |
| 4 | /Q1 | output | Differential PECL Output 1, the complementary side of the Q1/̅Q1 pair, which the datasheet rates for a continuous output current of 50 mA. |
| 5 | GND | power_in | Ground reference for the device; the datasheet states that only +5V and ground are required for operation. |
| 6 | D1 | input | TTL Input 1, with VIH minimum 2.0 V and VIL maximum 0.8 V, per the TTL DC characteristics. |
| 7 | D0 | input | TTL Input 0, with VIH minimum 2.0 V and VIL maximum 0.8 V, per the TTL DC characteristics. |
| 8 | VCC | power_in | +5.0V supply; the electrical characteristics specify VCC = 4.2 V to 5.5 V, and the absolute maximum rating is +7.0 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Logic ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output High Voltage (TA = -40°C) | VOH | 3915 |  | 4120 | mV | TA = -40°C; values for VCC = 5V; level specs vary 1:1 with VCC | 2 |
| Output High Voltage (TA = 0°C to +85°C) | VOH | 3975 |  | 4120 | mV | TA = 0°C to +85°C; values for VCC = 5V; level specs vary 1:1 with VCC | 2 |
| Output Low Voltage (TA = -40°C) | VOL | 3170 |  | 3445 | mV | TA = -40°C; values for VCC = 5V; level specs vary 1:1 with VCC | 2 |
| Output Low Voltage (TA = 0°C to +85°C) | VOL | 3190 |  | 3380 | mV | TA = 0°C to +85°C; values for VCC = 5V; level specs vary 1:1 with VCC | 2 |
| Power Supply Current | ICC |  |  | 30 | mA |  | 2 |
| Input High Voltage | VIH | 2 |  |  | V |  | 2 |
| Input Low Voltage | VIL |  |  | 0.8 | V |  | 2 |
| Input High Current (VIN = 2.7V) | IIH |  |  | 20 | µA | VIN = 2.7V | 2 |
| Input High Current (VIN = VCC) | IIH |  |  | 100 | µA | VIN = VCC | 2 |
| Input Low Current | IIL |  |  | -0.2 | mA | VIN = 0.5V | 2 |
| Input Clamp Voltage | VIK |  |  | -1.2 | V | IIN = -18 mA | 2 |
| Propagation Delay to Output D, ENECL/ENTTL | tPD | 100 |  | 600 | ps | 50Ω to VCC, 2.0V | 3 |
| Output Rise/Fall Time, 20% to 80% | tr/tf | 200 |  | 500 | ps | 50Ω to VCC, 2.0V | 3 |
| Part-to-Part Skew (Note 1: guaranteed, not tested) | tskpp |  |  | 500 | ps | 50Ω to VCC, 2.0V | 3 |
| Within-Device Skew (Note 1, Note 2) | tskew |  |  | 100 | ps | 50Ω to VCC, 2.0V | 3 |
| Operating Temperature Range | TA | -40 |  | 85 | °C |  | 3 |
| Storage Temperature Range | TS | -65 |  | 150 | °C |  | 3 |
| Lead Temperature | TLEAD |  |  | 260 | °C | Soldering, 20s | 3 |
| Power Supply Voltage | VCC | -0.5 |  | 7 | V |  | 2 |
| TTL Input Voltage | VI | -0.5 |  |  | V | Upper limit printed as VCC | 2 |
| PECL Output Current, Continuous | IOUT |  |  | 50 | mA |  | 2 |
| PECL Output Current, Surge | IOUT |  |  | 100 | mA |  | 2 |
| Supply Voltage (electrical characteristics range) | VCC | 4.2 |  | 5.5 | V | TA = -40°C to +85°C, unless noted | 2 |

## CAD (KiCad official)

- Symbol: `SY100ELT22ZG`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `sy100elt22zg-etched.step` / `sy100elt22zg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sy100elt22zg.step` / `sy100elt22zg.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/sy100elt22zg-datasheet.pdf) (12 pp, sha256 `8ec52b6e1c79b906`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sy100elt22zg-datasheet.pdf)