component
SXL1509-ADJE1
Public Made by Adomby adom
JSMSEMI DC-DC Converters, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSXL1509-ADJE1
JSMSEMI · DC-DC Converters · SOP-8
SXL1509-ADJE1 from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Positive supply input for the switching regulator. Absolute max +40 V; operating 4.5 V to 40 V. Requires a bypass capacitor to minimize input voltage transients and supply switching current. |
| 2 | Output | output | Power switching output pin from the internal 3 A transistor. Voltage at this pin swings between (+VIN - VSAT) and about -0.5 V; VSAT is typically 1.2 V at IOUT = 2 A. PCB copper on this net should be minimized to reduce switching-noise coupling. |
| 3 | FB | input | Output-voltage feedback control input; senses the regulated output through a divider to close the feedback loop. Regulation reference VFB = 1.23 V typ (adjustable version); feedback bias current 50 nA typ, 100 nA max. Absolute max -0.3 V to VIN. |
| 4 | EN | input | ON/OFF shutdown logic input. Pulling EN below ~1.3 V (VIL <= 0.6 V) enables the regulator; pulling EN above ~1.3 V (VIH >= 2.0 V) shuts the regulator down to ~150 uA standby current. Tie to GND if shutdown is not used. Absolute max -0.3 V to VIN. |
| 5 | GND | power_in | Circuit ground. Pins 5, 6, 7 and 8 are all GND and must be tied together to the ground plane for proper operation and thermal dissipation. |
| 6 | GND | power_in | Circuit ground. Tie to system GND alongside pins 5, 7 and 8. |
| 7 | GND | power_in | Circuit ground. Tie to system GND alongside pins 5, 6 and 8. |
| 8 | GND | power_in | Circuit ground. Tie to system GND alongside pins 5, 6 and 7; use wide copper for thermal dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | SOP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
SXL1509-ADJE1
CAD (KiCad official)
- Symbol:
SXL1509-ADJE1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
sxl1509-adje1-etched.step/sxl1509-adje1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sxl1509-adje1.step/sxl1509-adje1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JSMSEMI datasheet (9 pp, sha256
fe55d8c30e122f5a, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).