Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

SXL1509-3.3E1

JSMSEMI · DC-DC Converters · SOP-8

SXL1509-3.3E1 from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Positive input supply for the IC switching regulator. Operating range 4.5V to 40V (absolute max +40V). Requires a bypass capacitor at this pin to minimize voltage transients and supply the switching currents.
2 Output output Internal power switch output. Voltage swings between (+VIN − VSAT) and approximately −0.5V with duty cycle of approximately VOUT/VIN. Connects to the external inductor/catch-diode node; PCB copper on this pin should be minimized to reduce EMI coupling.
3 FB input Output voltage feedback control input. Senses the regulated output voltage to close the feedback loop. For the fixed 3.3V version this connects directly to VOUT; feedback bias current is ~50nA (adjustable version).
4 EN input ON/OFF shutdown logic input. Pulling below ~1.3V (VIL max 0.6V) turns the regulator on; pulling above ~1.3V (VIH min 2.0V) shuts it down, dropping supply current to ~150µA. Tie to GND if shutdown feature is not needed.
5 GND power_in Circuit ground. All four GND pins (5, 6, 7, 8) are tied to circuit ground and should be connected together on the PCB with generous copper for thermal dissipation.
6 GND power_in Circuit ground. All four GND pins (5, 6, 7, 8) are tied to circuit ground and should be connected together on the PCB with generous copper for thermal dissipation.
7 GND power_in Circuit ground. All four GND pins (5, 6, 7, 8) are tied to circuit ground and should be connected together on the PCB with generous copper for thermal dissipation.
8 GND power_in Circuit ground. All four GND pins (5, 6, 7, 8) are tied to circuit ground and should be connected together on the PCB with generous copper for thermal dissipation.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOP-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SXL1509-3.3E1

CAD (KiCad official)

  • Symbol: SXL1509-3.3E1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: sxl1509-3-3e1-etched.step / sxl1509-3-3e1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sxl1509-3-3e1.step / sxl1509-3-3e1.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sxl1509-3-3e1.step 122 KB You want the bare part, or you mark your own boards.
sxl1509-3-3e1-etched.step 2.5 MB You want the part with SXL1509-3.3E1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 609 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (9 pp, sha256 d10c2e5355fe210a, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF