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SWD4N80D

Public Made by Adom

by adom

Samwin MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SWD4N80D

Samwin · MOSFETs · TO-252

SWD4N80D from Samwin, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal of the N-channel MOSFET; gate-to-source voltage limited to ±30 V with typical total gate charge of 19 nC.
2 Drain passive Drain terminal of the N-channel MOSFET; drain-to-source voltage rated 800 V with continuous drain current of 4 A at TC=25°C.
3 Source passive Source terminal of the N-channel MOSFET; body diode continuous source current is 4 A and pulsed 16 A.

Key specifications

Parameter Value
Manufacturer Samwin
Package TO-252
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain to source voltage VDSS 800 V 1
Continuous drain current ID 4 A TC=25°C; limited by junction temperature 1
Continuous drain current ID 2.5 A TC=100°C; limited by junction temperature 1
Drain current pulsed IDM 16 A note 1 1
Gate to source voltage VGS -30 30 V 1
Single pulsed avalanche energy EAS 128 mJ note 2 1
Repetitive avalanche energy EAR 15 mJ note 1 1
Peak diode recovery dv/dt dv/dt 5 V/ns note 3 1
Operating junction and storage temperature TSTG, TJ -55 150 °C 1
Maximum lead temperature for soldering TL 300 °C 1/8 from case for 5 seconds 1
Drain to source breakdown voltage BVDSS 800 V VGS=0V, ID=250uA 2
Drain to source leakage current IDSS 1 uA VDS=800V, VGS=0V 2
Drain to source leakage current IDSS 50 uA VDS=640V, TC=125°C 2
Gate to source leakage current, forward IGSS 100 nA VGS=30V, VDS=0V 2
Gate to source leakage current, reverse IGSS -100 nA VGS=-30V, VDS=0V 2
Gate threshold voltage VGS(TH) 2.5 4.5 V VDS=VGS, ID=250uA 2
Drain to source on state resistance RDS(ON) 3.2 3.8 Ω VGS=10V, ID=2A 2
Source to drain continuous current IS 4 A Integral reverse p-n junction diode in the MOSFET 2
Pulsed source current ISM 16 A 2
Diode forward voltage drop VSD 1.4 V IS=4A, VGS=0V 2
Breakdown voltage temperature coefficient ΔBVDSS/ΔTJ 0.75 V/°C ID=250uA, referenced to 25°C 2
Forward transconductance Gfs 4 S VDS=30V, ID=2A 2
Input capacitance Ciss 679 pF VGS=0V, VDS=25V, f=1MHz 2
Output capacitance Coss 55 pF VGS=0V, VDS=25V, f=1MHz 2
Reverse transfer capacitance Crss 9.5 pF VGS=0V, VDS=25V, f=1MHz 2
Turn on delay time td(on) 17 ns VDS=400V, ID=4A, RG=25Ω, VGS=10V 2
Rising time tr 29 ns VDS=400V, ID=4A, RG=25Ω, VGS=10V 2
Turn off delay time td(off) 52 ns VDS=400V, ID=4A, RG=25Ω, VGS=10V 2
Fall time tf 29 ns VDS=400V, ID=4A, RG=25Ω, VGS=10V 2
Total gate charge Qg 19 nC VDS=640V, VGS=10V, ID=4A 2
Gate-source charge Qgs 4 nC VDS=640V, VGS=10V, ID=4A 2
Gate-drain charge Qgd 9 nC VDS=640V, VGS=10V, ID=4A 2
Gate resistance Rg 3.6 Ω VDS=0V, Scan F mode 2
Reverse recovery time trr 488 ns IS=4A, VGS=0V, dIF/dt=100A/us 2
Reverse recovery charge Qrr 2.6 uC IS=4A, VGS=0V, dIF/dt=100A/us 2

CAD (KiCad official)

  • Symbol: SWD4N80D
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: swd4n80d-etched.step / swd4n80d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); swd4n80d.step / swd4n80d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Samwin datasheet (7 pp, sha256 1bfc5de63b230f74, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF