# SWD2N60DC

**Samwin** · MOSFETs · TO-252

SWD2N60DC from Samwin, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal of the N-channel MOSFET; the gate-to-source voltage is rated ±30 V in the absolute maximum ratings. |
| 2 | Drain | passive | Drain terminal; the drain-to-source voltage is rated 600 V and the continuous drain current is 2 A at TC=25°C, limited by junction temperature. |
| 3 | Source | passive | Source terminal; the integral body diode is rated 2 A continuous source current and 8 A pulsed source current. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Samwin |
| Package | TO-252 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain to source voltage | VDSS |  |  | 600 | V |  | 1 |
| Continuous drain current | ID |  |  | 2 | A | TC=25oC; limited by junction temperature | 1 |
| Continuous drain current | ID |  |  | 1.26 | A | TC=100oC; limited by junction temperature | 1 |
| Drain current pulsed | IDM |  |  | 8 | A | note 1 | 1 |
| Gate to source voltage | VGS | -30 |  | 30 | V |  | 1 |
| Single pulsed avalanche energy | EAS |  |  | 80 | mJ | note 2 | 1 |
| Repetitive avalanche energy | EAR |  |  | 12 | mJ | note 1 | 1 |
| Peak diode recovery dv/dt | dv/dt |  |  | 5 | V/ns | note 3 | 1 |
| Total power dissipation | PD |  |  | 78 | W | TC=25oC | 1 |
| Derating factor above 25oC | PD |  |  | 0.6 | W/oC | above 25oC | 1 |
| Operating junction and storage temperature | TSTG, TJ | -55 |  | 150 | oC |  | 1 |
| Maximum lead temperature for soldering | TL |  |  | 300 | oC | 1/8 from case for 5 seconds | 1 |
| Thermal resistance, junction to case | Rthjc |  |  | 1.6 | oC/W |  | 1 |
| Thermal resistance, junction to ambient | Rthja |  |  | 86.6 | oC/W |  | 1 |
| Drain to source breakdown voltage | BVDSS | 600 |  |  | V | VGS=0V, ID=250uA | 2 |
| Drain to source leakage current | IDSS |  |  | 1 | uA | VDS=600V, VGS=0V | 2 |
| Drain to source leakage current | IDSS |  |  | 50 | uA | VDS=480V, TC=125oC | 2 |
| Gate to source leakage current, forward | IGSS |  |  | 100 | nA | VGS=30V, VDS=0V | 2 |
| Gate to source leakage current, reverse | IGSS |  |  | -100 | nA | VGS=-30V, VDS=0V | 2 |
| Gate threshold voltage | VGS(TH) | 2.5 |  | 4.5 | V | VDS=VGS, ID=250uA | 2 |
| Drain to source on state resistance | RDS(ON) |  | 3.9 | 4.5 | Ω | VGS=10V, ID=1A | 2 |
| Diode forward voltage drop | VSD |  |  | 1.4 | V | IS=2A, VGS=0V | 2 |
| Continuous source current | IS |  |  | 2 | A | Integral reverse p-n junction diode in the MOSFET | 2 |
| Pulsed source current | ISM |  |  | 8 | A |  | 2 |

## CAD (KiCad official)

- Symbol: `SWD2N60DC`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `swd2n60dc-etched.step` / `swd2n60dc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `swd2n60dc.step` / `swd2n60dc.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Samwin datasheet](docs/swd2n60dc-datasheet.pdf) (6 pp, sha256 `e51f2842a8d096a0`, retrieved 2026-11-04, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/swd2n60dc-datasheet.pdf)