# SUD50P06-15

**UMW** · MOSFETs · TO-252

SUD50P06-15 from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | GATE terminal of the P-channel MOSFET; the datasheet rates the gate-source voltage at ±20 V (VGS). |
| 2 | D | passive | DRAIN terminal, electrically connected to the drain tab; the datasheet rates the drain-source voltage at -60 V (VDS). |
| 3 | S | passive | SOURCE terminal of the MOSFET, the return path for the drain current. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `SUD50P06-15`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `sud50p06-15-etched.step` / `sud50p06-15-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sud50p06-15.step` / `sud50p06-15.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755887532234293248) (9 pp, sha256 `61a8eae4dc8f14b4`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sud50p06-15-datasheet.pdf)