# SUD50P06-15-GE3

**Vishay Intertech** · MOSFETs · TO-252

SUD50P06-15-GE3 from Vishay Intertech, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the P-channel MOSFET, with a VGS rating of ±20 V. |
| 2 | D | passive | Drain, with VDS of -60 V and continuous ID of -50 A (package limited); the drain is also connected to the tab. |
| 3 | S | passive | Source of the P-channel MOSFET, with continuous body-diode current IS of -50 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `SUD50P06-15-GE3`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `sud50p06-15-ge3-etched.step` / `sud50p06-15-ge3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sud50p06-15-ge3.step` / `sud50p06-15-ge3.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203549202599936) (7 pp, sha256 `080006d1d947f0fd`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sud50p06-15-ge3-datasheet.pdf)